📄 reserv.tan.rpt
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; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg3 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg4 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg5 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg6 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg7 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg8 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 143.84 MHz ( period = 6.952 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg9 ; sld_signaltap:rsv1|acq_trigger_in_reg[11] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg0 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg1 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg2 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg3 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg4 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg5 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg6 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg7 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg8 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 149.66 MHz ( period = 6.682 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg9 ; sld_signaltap:rsv1|acq_trigger_in_reg[12] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg0 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg1 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg2 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg3 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg4 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg5 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg6 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg7 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg8 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.97 MHz ( period = 6.624 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a7~porta_address_reg9 ; sld_signaltap:rsv1|acq_trigger_in_reg[17] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a6~porta_address_reg0 ; sld_signaltap:rsv1|acq_trigger_in_reg[14] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a6~porta_address_reg1 ; sld_signaltap:rsv1|acq_trigger_in_reg[14] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a6~porta_address_reg2 ; sld_signaltap:rsv1|acq_trigger_in_reg[14] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a6~porta_address_reg3 ; sld_signaltap:rsv1|acq_trigger_in_reg[14] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a6~porta_address_reg4 ; sld_signaltap:rsv1|acq_trigger_in_reg[14] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|altsyncram_56e2:altsyncram1|ram_block3a6~porta_address_reg5 ; sld_signaltap:rsv1|acq_trigger_in_reg[14] ; CLK ; CLK ; None ; None ; None ;
; N/A ; 150.99 MHz ( period = 6.623 ns ) ; D
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