reserv.fit.eqn

采用高速A/D的存储示波器设计

--PB1L71 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~915 at LC_X14_Y8_N2
--operation mode is normal

PB1L71 = AMPP_FUNCTION(KB1_state[4], QB1_safe_q[5], PB1L11, QB1_safe_q[4]);


--PB1L81 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~916 at LC_X14_Y8_N5
--operation mode is normal

PB1L81 = AMPP_FUNCTION(KB1_state[4], QB1_safe_q[6], PB1L11, QB1_safe_q[5]);


--PB1L91 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~917 at LC_X14_Y8_N7
--operation mode is normal

PB1L91 = AMPP_FUNCTION(KB1_state[4], QB1_safe_q[6], PB1L11, QB1_safe_q[7]);


--PB1L02 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~918 at LC_X14_Y8_N0
--operation mode is normal

PB1L02 = AMPP_FUNCTION(KB1_state[4], QB1_safe_q[7], PB1L11, QB1_safe_q[8]);


--PB1L12 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~919 at LC_X16_Y9_N4
--operation mode is normal

PB1L12 = AMPP_FUNCTION(QB1_safe_q[9], KB1_state[4], PB1L11, QB1_safe_q[8]);


--PB1L22 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~920 at LC_X16_Y9_N9
--operation mode is normal

PB1L22 = AMPP_FUNCTION(QB1_safe_q[9], KB1_state[4], PB1L11, altera_internal_jtag);


--D1L02 is sld_hub:sld_hub_inst|HUB_TDO~513 at LC_X16_Y7_N3
--operation mode is normal

D1L02 = AMPP_FUNCTION(HB1_Q[1], PB1_ram_rom_data_reg[0], HB1_Q[2], HB1_Q[0]);


--J3_WORD_SR[0] is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] at LC_X11_Y7_N5
--operation mode is normal

J3_WORD_SR[0] = AMPP_FUNCTION(A1L51, J3_word_counter[0], J3L81, J3_WORD_SR[1], J3L22, !J1_clear_signal, KB1_state[4], PB1L8);


--D1L12 is sld_hub:sld_hub_inst|HUB_TDO~514 at LC_X15_Y7_N7
--operation mode is normal

D1L12 = AMPP_FUNCTION(J3_WORD_SR[0], HB1_Q[0], D1L91);

--PB1_bypass_reg_out is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out at LC_X15_Y7_N7
--operation mode is normal

PB1_bypass_reg_out = AMPP_FUNCTION(A1L51, altera_internal_jtag, !D1L2, GND, D1L74);


--D1L22 is sld_hub:sld_hub_inst|HUB_TDO~515 at LC_X16_Y7_N0
--operation mode is normal

D1L22 = AMPP_FUNCTION(D1_jtag_debug_mode_usr1, D1L12, HB6_Q[0], D1L02);


--HB6_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] at LC_X16_Y6_N6
--operation mode is normal

HB6_Q[1] = AMPP_FUNCTION(A1L51, HB8_Q[8], altera_internal_jtag, !D1L2, D1L53);


--HB2_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[3] at LC_X15_Y5_N2
--operation mode is normal

HB2_Q[3] = AMPP_FUNCTION(A1L51, HB5_Q[0], HB8_Q[3], HB4_Q[3], !D1L2, D1L93);


--HB2_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5] at LC_X15_Y5_N9
--operation mode is normal

HB2_Q[5] = AMPP_FUNCTION(A1L51, HB5_Q[0], HB8_Q[5], HB4_Q[5], !D1L2, D1L93);


--HB2_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[4] at LC_X15_Y5_N7
--operation mode is normal

HB2_Q[4] = AMPP_FUNCTION(A1L51, HB5_Q[0], HB8_Q[4], HB4_Q[4], !D1L2, D1L93);


--D1L31 is sld_hub:sld_hub_inst|HUB_TDO~497 at LC_X16_Y7_N6
--operation mode is normal

D1L31 = AMPP_FUNCTION(HB2_Q[5], HB2_Q[4], D1_jtag_debug_mode_usr1);


--D1L41 is sld_hub:sld_hub_inst|HUB_TDO~498 at LC_X16_Y7_N7
--operation mode is normal

D1L41 = AMPP_FUNCTION(HB6_Q[1], HB2_Q[3], D1L31);

--C1_bypass_reg_out is sld_signaltap:rsv1|bypass_reg_out at LC_X16_Y7_N7
--operation mode is normal

C1_bypass_reg_out = AMPP_FUNCTION(A1L51, altera_internal_jtag, !C1_reset_all, GND, D1L84);


--J2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] at LC_X19_Y7_N2
--operation mode is normal

J2_WORD_SR[0] = AMPP_FUNCTION(A1L51, J2_word_counter[4], J2L91, J2_WORD_SR[1], J2L12, !J1_clear_signal, KB1_state[4], D1L4);


--LB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0] at LC_X20_Y7_N5
--operation mode is normal

LB1_dffe1a[0] = AMPP_FUNCTION(A1L51, HB8_Q[2], HB8_Q[1], HB8_Q[3], D1L54, !D1L2, D1L7);


--D1L32 is sld_hub:sld_hub_inst|HUB_TDO~516 at LC_X20_Y7_N2
--operation mode is normal

D1L32 = AMPP_FUNCTION(J2_WORD_SR[0], LB1_dffe1a[0]);

--D1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG at LC_X20_Y7_N2
--operation mode is normal

D1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L51, D1L21, VCC, GND);


--D1L42 is sld_hub:sld_hub_inst|HUB_TDO~517 at LC_X16_Y7_N2
--operation mode is normal

D1L42 = AMPP_FUNCTION(D1_jtag_debug_mode_usr1, HB7_Q[0], D1L41, D1L32);


--M1_dffs[0] is sld_signaltap:rsv1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0] at LC_X16_Y5_N6
--operation mode is normal

M1_dffs[0] = AMPP_FUNCTION(A1L51, L1_is_max_write_address_ff, C1L03, KB1_state[4], M1_dffs[1], !C1_reset_all);


--D1L51 is sld_hub:sld_hub_inst|HUB_TDO~506 at LC_X16_Y5_N8
--operation mode is normal

D1L51 = AMPP_FUNCTION(M1_dffs[0], HB2_Q[4], HB2_Q[3]);

--M3_dffs[0] is sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0] at LC_X16_Y5_N8
--operation mode is normal

M3_dffs[0] = AMPP_FUNCTION(A1L51, M3_dffs[1], !C1_reset_all, GND, K1_trigger_setup_ena);


--D1L61 is sld_hub:sld_hub_inst|HUB_TDO~507 at LC_X16_Y7_N4
--operation mode is normal

D1L61 = AMPP_FUNCTION(HB6_Q[1], D1L51, D1_jtag_debug_mode_usr1);


--HB8_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] at LC_X16_Y8_N3
--operation mode is normal

HB8_Q[0] = AMPP_FUNCTION(A1L51, PB1_is_in_use_reg, D1L62, HB8_Q[1], D1L33, !D1L2, KB1_state[4], D1_IRSR_ENA);


--J1_WORD_SR[0] is sld_signaltap:rsv1|sld_rom_sr:crc_rom_sr|WORD_SR[0] at LC_X13_Y7_N7
--operation mode is normal

J1_WORD_SR[0] = AMPP_FUNCTION(A1L51, KB1_state[4], J1_WORD_SR[1], J1L3, !J1_clear_signal, C1L82);


--D1L71 is sld_hub:sld_hub_inst|HUB_TDO~508 at LC_X16_Y7_N8
--operation mode is normal

D1L71 = AMPP_FUNCTION(HB2_Q[5], HB6_Q[1], J1_WORD_SR[0]);


--D1L81 is sld_hub:sld_hub_inst|HUB_TDO~509 at LC_X16_Y7_N9
--operation mode is normal

D1L81 = AMPP_FUNCTION(D1_jtag_debug_mode_usr1, HB8_Q[0], D1L71);


--KB1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] at LC_X15_Y6_N2
--operation mode is normal

KB1_state[8] = AMPP_FUNCTION(A1L51, KB1_state[7], KB1_state[5], A1L71, VCC);


--KB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] at LC_X12_Y7_N0
--operation mode is normal

KB1_state[3] = AMPP_FUNCTION(A1L51, KB1_state[2], A1L71, VCC);


--D1L15 is sld_hub:sld_hub_inst|process14~0 at LC_X20_Y7_N7
--operation mode is normal

D1L15 = AMPP_FUNCTION(KB1_state[4], KB1_state[3]);


--D1L9 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~1 at LC_X16_Y6_N1
--operation mode is normal

D1L9 = AMPP_FUNCTION(HB6_Q[0], D1_OK_TO_UPDATE_IR_Q, KB1_state[5]);


--PB1_ir_loaded_address_reg[1] is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1] at LC_X14_Y6_N2
--operation mode is normal

PB1_ir_loaded_address_reg[1] = AMPP_FUNCTION(A1L51, QB1_safe_q[1], !HB1_Q[0], PB1L21);


--HB8_Q[4] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[4] at LC_X16_Y8_N2
--operation mode is normal

HB8_Q[4] = AMPP_FUNCTION(A1L51, D1L33, PB1_ir_loaded_address_reg[3], HB8_Q[5], D1L23, !D1L2, KB1_state[4], D1_IRSR_ENA);


--LB1_dffe1a[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[3] at LC_X20_Y7_N3
--operation mode is normal

LB1_dffe1a[3] = AMPP_FUNCTION(A1L51, HB8_Q[2], HB8_Q[1], HB8_Q[3], D1L54, !D1L2, D1L7);


--D1L43 is sld_hub:sld_hub_inst|IR_MUX_SEL[1]~16 at LC_X15_Y9_N4
--operation mode is normal

D1L43 = AMPP_FUNCTION(HB8_Q[4], LB1_dffe1a[3]);

--HB8_Q[8]