reserv.fit.eqn

采用高速A/D的存储示波器设计

RB1_safe_q[3] = AMPP_FUNCTION(A1L51, RB1_safe_q[3], PB1L01, !HB1_Q[3], PB1_ram_rom_load_read_data, RB1L61, RB1L71);


--RB1_safe_q[1] is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[1] at LC_X14_Y9_N2
--operation mode is arithmetic

RB1_safe_q[1] = AMPP_FUNCTION(A1L51, RB1_safe_q[1], PB1L01, !HB1_Q[3], PB1_ram_rom_load_read_data, RB1L01, RB1L11);

--RB1L31 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[1]~COUT0 at LC_X14_Y9_N2
--operation mode is arithmetic

RB1L31 = AMPP_FUNCTION(RB1_safe_q[1], RB1L01);

--RB1L41 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[1]~COUT1 at LC_X14_Y9_N2
--operation mode is arithmetic

RB1L41 = AMPP_FUNCTION(RB1_safe_q[1], RB1L11);


--RB1_safe_q[0] is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[0] at LC_X14_Y9_N1
--operation mode is arithmetic

RB1_safe_q[0] = AMPP_FUNCTION(A1L51, RB1_safe_q[0], PB1L01, !HB1_Q[3], PB1_ram_rom_load_read_data);

--RB1L01 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[0]~COUT0 at LC_X14_Y9_N1
--operation mode is arithmetic

RB1L01 = AMPP_FUNCTION(RB1_safe_q[0]);

--RB1L11 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[0]~COUT1 at LC_X14_Y9_N1
--operation mode is arithmetic

RB1L11 = AMPP_FUNCTION(RB1_safe_q[0]);


--RB1_safe_q[2] is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[2] at LC_X14_Y9_N3
--operation mode is arithmetic

RB1_safe_q[2] = AMPP_FUNCTION(A1L51, PB1L01, RB1_safe_q[2], !HB1_Q[3], PB1_ram_rom_load_read_data, RB1L31, RB1L41);

--RB1L61 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[2]~COUT0 at LC_X14_Y9_N3
--operation mode is arithmetic

RB1L61 = AMPP_FUNCTION(RB1_safe_q[2], RB1L31);

--RB1L71 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_pd8:auto_generated|safe_q[2]~COUT1 at LC_X14_Y9_N3
--operation mode is arithmetic

RB1L71 = AMPP_FUNCTION(RB1_safe_q[2], RB1L41);


--PB1_ram_rom_load_read_data is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_load_read_data at LC_X14_Y9_N6
--operation mode is normal

PB1_ram_rom_load_read_data = AMPP_FUNCTION(RB1_safe_q[0], RB1_safe_q[3], RB1_safe_q[1], RB1_safe_q[2]);


--HB3_Q[2] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[2] at LC_X15_Y8_N2
--operation mode is normal

HB3_Q[2] = AMPP_FUNCTION(A1L51, HB8_Q[2], !D1L2, GND, D1L9);


--HB8_Q[2] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2] at LC_X16_Y8_N4
--operation mode is normal

HB8_Q[2] = AMPP_FUNCTION(A1L51, PB1_ir_loaded_address_reg[1], D1L03, HB8_Q[3], D1L33, !D1L2, KB1_state[4], D1_IRSR_ENA);


--KB1_state[1] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[1] at LC_X12_Y10_N9
--operation mode is normal

KB1_state[1] = AMPP_FUNCTION(A1L51, KB1_state[0], KB1L81, A1L71, VCC);


--D1L2 is sld_hub:sld_hub_inst|CLEAR_SIGNAL~0 at LC_X20_Y10_N6
--operation mode is normal

D1L2 = AMPP_FUNCTION(KB1_state[1]);

--HB9_Q[0] is sld_hub:sld_hub_inst|sld_dffex:RESET|Q[0] at LC_X20_Y10_N6
--operation mode is normal

HB9_Q[0] = AMPP_FUNCTION(A1L51, LB1_dffe1a[7], D1_jtag_debug_mode_usr1, GND, D1L3);


--KB1_state[5] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] at LC_X16_Y6_N5
--operation mode is normal

KB1_state[5] = AMPP_FUNCTION(A1L51, KB1_state[3], KB1_state[4], A1L71, VCC);


--D1_OK_TO_UPDATE_IR_Q is sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q at LC_X13_Y9_N9
--operation mode is normal

D1_OK_TO_UPDATE_IR_Q = AMPP_FUNCTION(A1L51, D1_jtag_debug_mode_usr1, KB1_state[8], VCC, D1L05);


--D1L01 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~18 at LC_X16_Y6_N8
--operation mode is normal

D1L01 = AMPP_FUNCTION(D1_OK_TO_UPDATE_IR_Q, KB1_state[5]);


--HB7_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] at LC_X16_Y6_N0
--operation mode is normal

HB7_Q[0] = AMPP_FUNCTION(A1L51, D1L25, VCC, D1L53);


--LB1_dffe1a[2] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[2] at LC_X20_Y7_N8
--operation mode is normal

LB1_dffe1a[2] = AMPP_FUNCTION(A1L51, HB8_Q[2], HB8_Q[1], HB8_Q[3], D1L54, !D1L2, D1L7);


--D1L73 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~125 at LC_X16_Y6_N3
--operation mode is normal

D1L73 = AMPP_FUNCTION(LB1_dffe1a[2], HB7_Q[0]);


--HB6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] at LC_X16_Y6_N7
--operation mode is normal

HB6_Q[0] = AMPP_FUNCTION(A1L51, HB8_Q[8], altera_internal_jtag, !D1L2, D1L53);


--D1L83 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~126 at LC_X16_Y6_N9
--operation mode is normal

D1L83 = AMPP_FUNCTION(HB6_Q[0], D1L01, HB5_Q[0], D1L73);


--D1_jtag_debug_mode is sld_hub:sld_hub_inst|jtag_debug_mode at LC_X12_Y7_N7
--operation mode is normal

D1_jtag_debug_mode = AMPP_FUNCTION(A1L51, D1_jtag_debug_mode, KB1_state[15], D1L54, D1L64, KB1_state[0]);


--D1L74 is sld_hub:sld_hub_inst|NODE_ENA~32 at LC_X15_Y7_N3
--operation mode is normal

D1L74 = AMPP_FUNCTION(HB5_Q[0], D1_jtag_debug_mode, HB6_Q[0]);


--KB1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] at LC_X19_Y9_N2
--operation mode is normal

KB1_state[4] = AMPP_FUNCTION(A1L51, KB1_state[3], A1L71, KB1_state[4], KB1_state[7], VCC);


--D1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1 at LC_X12_Y7_N5
--operation mode is normal

D1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L51, M5_dffs[1], D1L45, D1L35, M5_dffs[0], KB1_state[0], KB1_state[12]);


--HB1_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] at LC_X14_Y7_N8
--operation mode is normal

HB1_Q[1] = AMPP_FUNCTION(A1L51, HB8_Q[1], HB5_Q[0], HB3_Q[1], !D1L2, D1L83);


--D1L91 is sld_hub:sld_hub_inst|HUB_TDO~512 at LC_X15_Y7_N6
--operation mode is normal

D1L91 = AMPP_FUNCTION(HB1_Q[1], HB1_Q[2]);


--PB1L01 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~55 at LC_X15_Y7_N0
--operation mode is normal

PB1L01 = AMPP_FUNCTION(KB1_state[4], D1L74, D1_jtag_debug_mode_usr1, D1L91);


--HB1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] at LC_X15_Y6_N5
--operation mode is normal

HB1_Q[3] = AMPP_FUNCTION(A1L51, HB5_Q[0], HB3_Q[3], HB8_Q[3], !D1L2, D1L83);


--PB1L43 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~44 at LC_X14_Y9_N8
--operation mode is normal

PB1L43 = AMPP_FUNCTION(RB1_safe_q[0], RB1_safe_q[3], RB1_safe_q[2]);


--PB1L9 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~3 at LC_X14_Y9_N9
--operation mode is normal

PB1L9 = AMPP_FUNCTION(HB1_Q[3], HB1_Q[1], RB1_safe_q[1], PB1L43);


--PB1L11 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|process5~12 at LC_X15_Y7_N4
--operation mode is normal

PB1L11 = AMPP_FUNCTION(D1_jtag_debug_mode_usr1, HB1_Q[3], D1L74);


--PB1L31 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~911 at LC_X14_Y6_N5
--operation mode is normal

PB1L31 = AMPP_FUNCTION(QB1_safe_q[1], QB1_safe_q[0], KB1_state[4], PB1L11);


--HB1_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] at LC_X15_Y6_N6
--operation mode is normal

HB1_Q[0] = AMPP_FUNCTION(A1L51, HB8_Q[0], HB5_Q[0], HB3_Q[0], !D1L2, D1L83);


--PB1_ram_rom_incr_addr is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr at LC_X14_Y9_N5
--operation mode is normal

PB1_ram_rom_incr_addr = AMPP_FUNCTION(HB1_Q[1], PB1L43, RB1_safe_q[1], PB1L33);


--PB1L41 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~912 at LC_X14_Y6_N9
--operation mode is normal

PB1L41 = AMPP_FUNCTION(QB1_safe_q[1], QB1_safe_q[2], KB1_state[4], PB1L11);


--PB1L51 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~913 at LC_X14_Y6_N6
--operation mode is normal

PB1L51 = AMPP_FUNCTION(KB1_state[4], QB1_safe_q[3], QB1_safe_q[2], PB1L11);


--PB1L61 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~914 at LC_X10_Y9_N2
--operation mode is normal

PB1L61 = AMPP_FUNCTION(KB1_state[4], QB1_safe_q[4], QB1_safe_q[3], PB1L11);