📄 usb.c
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{
usb_cfg = usb_buf[2]; /*set the configuration # */
if (usb_buf[2]!=0) /*set the configuration */
{
dtapid = 0; /*FIRST PID is DATA0 */
stalled = 0; /*nothing stalled */
FLUSHTX1; /*flush TX1 and disable */
write_usb(EPC1,EP_EN+01); /*enable EP1 at adr 1 */
FLUSHRX1; /*flush RX1 and disable */
write_usb(EPC2,EP_EN+02); /*enable EP2 at adr 2 */
write_usb(RXC1,RX_EN); /*enable RX1 */
FLUSHTX3; /*flush TX3 and disable */
/* double buffer here */
write_usb(EPC3,EP_EN+05); /*enable EP3 at adr 5 */
write_usb(EPC5,EP_EN+05); /*enable EP5 at adr 5 */
FLUSHRX3; /*flush RX3 and disable */
/* double buffer here */
write_usb(EPC4,EP_EN+06); /*enable EP4 at adr 6 */
write_usb(RXC2,RX_EN); /*enable RX2 */
write_usb(EPC6,EP_EN+06); /*enable EP6 at adr 6 */
write_usb(RXC3,RX_EN); /*enable RX3 */
}
else /*unconfigure the device */
{
write_usb(EPC1,0); /*disable EP1 */
write_usb(EPC2,0); /*disable EP2 */
write_usb(EPC3,0); /*disable EP3 */
write_usb(EPC4,0); /*disable EP4 */
write_usb(EPC5,0); /*disable EP5 */
write_usb(EPC6,0); /*disable EP6 */
}
}
/**********************************************************************/
/* The SET_FEATURE request is done here */
/**********************************************************************/
void setfeature(void)
{
switch (usb_buf[0]&0x03) /*find request target */
{
case 0: /*DEVICE */
break;
case 1: /*INTERFACE */
break;
case 2: /*ENDPOINT */
switch (usb_buf[3]) /*find specific endpoint */
{
case 0:
stall_ep0 = 1;
break;
case 1:
stall_ep1 = 1;
break;
case 2:
stall_ep2 = 1;
break;
case 3:
stall_ep3 = 1;
break;
case 4:
stall_ep4 = 1;
break;
case 5:
stall_ep5 = 1;
break;
case 6:
stall_ep6 = 1;
break;
default:
break;
}
break;
default: /*UNDEFINED */
break;
}
}
/**************************************************************************
This subroutine is used to get and send GP2021 regs in one transaction
The values of regs are stored in gp2021_regbuf0
This function just init the transaction , the rest are done in int service
This transaction is finished by TXD1
**************************************************************************/
void send_all_gp2021_TXD1(void )
{
sts_send_gp2021_TXD1 = 1;
FLUSHTX1;
bunch_write_usb(TXD1, (unsigned int)gp2021_reg_buf, 64);
gp2021_TXD1_idx = 64;
TXEN1_PID_NO_TGL;
}
/**************************************************************
This subroutine is used to get and send GP2021 regs in one transaction
The values of regs are stored in gp2021_regbuf0
This function just init the transaction , the rest are done in int service
This transaction is finished by TXD3 & TXD2, double buffers used
**************************************************************/
void send_all_gp2021_TXD3( void )
{
sts_send_gp2021_TXD23 = 1;
sts_send_first_end = 1;
FLUSHTX2; // fill TXD2 fifo first
bunch_write_usb(TXD2, (unsigned int)gp2021_reg_buf + usb_snd_idx, 64);
FLUSHTX3; // fill TXD3 fifl then
bunch_write_usb(TXD3, (unsigned int)(gp2021_reg_buf + usb_snd_idx + 64), 64);
gp2021_TXD23_idx = 128;
write_usb(EPC3,EP_EN+05); /*enable EP3 at adr 5 */
write_usb(EPC5,EP_EN+05); /*enable EP5 at adr 5 */
write_usb(TXC2,TX_LAST+TX_EN); // Begin TXD2 transmit, DATA0
write_usb(TXC3,TX_TOGL+TX_LAST+TX_EN); // Begin TXD3 transmit, DATA1
}
/**************************************************************************
This subroutine is to get and send all the regs of USBN9603
For debugging only
**************************************************************************/
void get_usbn9603(unsigned char* tmp_b)
{
unsigned char i;
for(i =0; i<64; i++)
tmp_b[i] = read_usb((unsigned int)(0x7E00+i));
}
void send_all_usbn9603_TXD1(unsigned char* tmp_b)
{
unsigned char i;
FLUSHTX1;
for(i =0; i<63; i++)
write_usb(TXD1, tmp_b[i]);
TXEN1_PID_NO_TGL;
}
/**********************************************************************/
/* This subroutine handles RX events for FIFO0 (endpoint 0) */
/**********************************************************************/
void rx_0(void)
{
rxstat=read_usb(RXS0); /*get receiver status */
#if DEBG ==1
put_char('R');
puthex_char(rxstat);
#endif
/*is this a setup packet? ***************************************/
if(rxstat & SETUP_R)
{
/*read data payload into buffer then flush/disble the RX ****/
for(desc_idx=0; desc_idx<8; desc_idx++)
{
usb_buf[desc_idx] = read_usb(RXD0);
//puthex_char(usb_buf[desc_idx]);
}
FLUSHRX0; /*make sure the RX is off */
FLUSHTX0; /*make sure the TX is off */
if ((usb_buf[0]&0x60)==0x00) /*if a standard request */
switch (usb_buf[1]) /*find request target */
{
case CLEAR_FEATURE:
clrfeature();
break;
case GET_CONFIGURATION:
write_usb(TXD0,usb_cfg);/*load the config value */
break;
case GET_DESCRIPTOR:
getdescriptor();
break;
case GET_STATUS:
getstatus();
break;
case SET_ADDRESS:
/*set and enable new address for endpoint 0, but set*/
/*DEF too, so new address doesn't take effect until */
/*the handshake completes */
write_usb(EPC0,DEF);
write_usb(FAR,usb_buf[2] | AD_EN);
break;
case SET_CONFIGURATION:
setconfiguration();
break;
case SET_FEATURE:
setfeature();
break;
default: /*unsupported standard req*/
break;
}
else /*if a non-standard req. */
{
}
/*the following is done for all setup packets. Note that if*/
/*no data was stuffed into the FIFO, the result of the fol- */
/*lowing will be a zero-length response. */
write_usb(TXC0,TX_TOGL+TX_EN); /*enable the TX (DATA1) */
dta_pid0=0; /*store NEXT PID state */
}
/*if not a setup packet, it must be an OUT packet ***************/
else
{
if (sts_getdesc) /*get_descr status stage? */
{
/*test for errors (zero length, correct PID) */
if ((rxstat& 0x5F)!=0x10) /*length error?? */
{
}
sts_getdesc=0; /*exit get_descr mode */
FLUSHTX0; /*flush TX0 and disable */
}
write_usb(RXC0,RX_EN); /*re-enable the receiver */
}
//test_b= 0;
/*we do this stuff for all rx_0 events **************************/
}
/**********************************************************************/
/* This subroutine handles RX events for FIFO1 (endpoint 2) */
/**********************************************************************/
void rx_1(void)
{
rxstat = read_usb(RXS1);
if( rxstat & SETUP_R)
{}
else if(rxstat & RX_ERR)
{}
else
{
sts_usbcmd = 1;
rsnc = read_usb(RXD1);
rcmd = read_usb(RXD1);
rdta = read_usb(RXD1);
radh = read_usb(RXD1);
radl = read_usb(RXD1);
rcks = read_usb(RXD1);
if(rsnc == SYNCBYT)
if(rcks = rsnc + rcmd + rdta + radh +radl)
{
do_cmd();
}
sts_usbcmd = 0;
}
if(!sts_send_gp2021_TXD1) /* if we are sending all the gp2021 regs, we need wait for other transfers*/
{
FLUSHRX1;
write_usb(RXC1, RX_EN);
}
}
/**********************************************************************/
/* This subroutine handles RX events for FIFO2 (endpoint 4) */
/**********************************************************************/
void rx_2(void)
{
rxstat = read_usb(RXS2);
if( (rxstat & RX_ERR) || !(rxstat & RX_LAST) || (rxstat & RX_TOGL) ) /* some error happened */
{
FLUSHRX2;
write_usb(RXC2, RX_EN);
}
else
{
bunch_read_usb(RXD2, (unsigned int)(gp2021_reg_write), 64);
FLUSHRX2;
write_usb(EPC4,0); /* disable RX2 temporarily */
}
}
/**********************************************************************/
/* This subroutine handles RX events for FIFO3 (endpoint 6) */
/**********************************************************************/
void rx_3(void)
{
rxstat = read_usb(RXS3);
if( (rxstat & RX_ERR) || !(rxstat & RX_LAST) || !(rxstat & RX_TOGL) ) /* some error happened */
{
FLUSHRX3;
write_usb(RXC3, RX_EN);
}
else
{
bunch_read_usb(RXD3, (unsigned int)(gp2021_reg_write+64), 61); /* whole packet length is 125 */
FLUSHRX3;
write_usb(RXC3, RX_EN);
write_usb(EPC4,EP_EN+06); /*enable EP4 at adr 6 */
write_usb(RXC2,RX_EN); /*enable RX2 */
get_data_ready = 1; /* set the data ready flag*/
sts_send_gp2021_all = gp2021_reg_write[0] & 0x01; /* set flag to indicate we need to transfer gp2021's reg*/
gp2021_reg_buf[324 + buf_idx ] = gp2021_reg_write[0]; // dummy[0]
gp2021_reg_buf[325 + buf_idx ] = frm_count1; // dummy[1]
gp2021_reg_buf[326 + buf_idx ] = frm_count; // dummy[2]
/* first byte is flag to indicate this transaction requires return or not */
}
}
/*********old code ***************************************************/
/*
{
rxstat = read_usb(RXS3);
puthex_char(rxstat);
if( rxstat & SETUP_R)
{}
else if(rxstat & RX_ERR)
{}
else
{
if( write_buf_leng > 0) // indicate that this package is the last one's continue;
{
if( write_buf_leng > write_buf_idx + 64 )
{
bunch_read_usb(RXD3, (unsigned int)(gp2021_reg_write+write_buf_idx), 64);
write_buf_idx += 64;
}
else
{
bunch_read_usb(RXD3, (unsigned int)(gp2021_reg_write+write_buf_idx), write_buf_leng-write_buf_idx+1);
write_buf_idx = 0;
write_buf_leng = 0; // the end of the whole transaction
get_data_ready = 1; // set the data ready flag;
sts_send_gp2021_all = 1; // set flag to indicate we need to transfer gp2021's reg
}
}
else // else this is a new package;
{
write_buf_leng = read_usb(RXD3); // the first byte is the total length
gp2021_reg_write[0] = write_buf_leng;
if(write_buf_leng > 64) // if this is only the first part of the whole transaction
{
bunch_read_usb(RXD3, (unsigned int)(gp2021_reg_write+1), 63);
write_buf_idx = 64;
}
else // if this package is the only package
{
bunch_read_usb(RXD3, (unsigned int)(gp2021_reg_write+1), write_buf_leng-1);
write_buf_idx = 0;
write_buf_leng = 0;
get_data_ready = 1; // set the data ready flag;
sts_send_gp2021_all = 1; // set flag to indicate we need to transfer gp2021's reg
}
} // end of if( write_buf_leng > 0)
}
FLUSHRX3;
write_usb(RXC3, RX_EN);
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