traffic.v

用verilog编的小程序,希望对需要的人有所帮助

module traffic(clk,en,lampa,lampb,acount,bcount);
output[7:0] acount,bcount;
output[3:0] lampa,lampb;   //?????????????
input clk,en;
reg[7:0] numa,numb;
reg tempa,tempb;
reg[2:0] counta,countb;
reg[7:0] ared,ayellow,agreen,aleft,bred,byellow,bgreen,bleft;
reg[3:0] lampa,lampb;

always @(en) 
  if(!en)
   begin
     ared     <=8'd55;       
     ayellow  <=8'd5;       
     agreen   <=8'd40;       
     aleft    <=8'd15;      
     
     bred     <=8'd65;      
     byellow  <=8'd5;        
     bleft    <=8'd15;       
     bgreen   <=8'd30;       
   end
  
 assign acount=numa;
 assign bcount=numb;
 
 always @(posedge clk)
    begin
      if(en)
      begin
          if(!tempa)
            begin
            tempa<=1;
            case(counta)
            0: begin 
               numa<=agreen; 
               lampa<=2;       //lampa?0010
               counta<=1;
               end 
          
            1: begin 
               numa<=ayellow; 
               lampa<=4;       //lampa?0100
               counta<=2;
               end   
          
            2: begin 
               numa<=aleft; 
               lampa<=1;       //lampa?0001
               counta<=3;
               end    
             
            3: begin 
               numa<=ayellow; 
               lampa<=4;       //lampa?0100  
               counta<=4;
               end 
             
            4: begin 
               numa<=ared; 
               lampa<=8;       //lampa?1000
               counta<=0;
               end 
            default:   lampa<=8;
            endcase
            end
           else begin          
                if(numa>1)
                   if(numa[3:0]==0)
                      begin
                      numa[3:0]<=4'b1001;
                      numa[7:4]<=numa[7:4]-1;
                      end
                   else numa[3:0]<=numa[3:0]-1;
                   
                   if(numa==2) 
                    tempa<=0;
                end
      end 
      else begin                    //en?????counta,tempa????lampa????
           lampa<=4'b1000;
           counta<=0;tempa<=0;
           end
    end 
    
    always @(posedge clk)
    begin
      if(en)
      begin
          if(!tempb)
            begin
            tempb<=1;
            case(countb)
            0: begin 
               numb<=bgreen; 
               lampb<=8;
               countb<=1;
               end 
          
            1: begin 
               numb<=byellow; 
               lampb<=2;
               countb<=2;
               end   
          
            2: begin 
               numb<=bleft; 
               lampb<=4;
               countb<=3;
               end    
             
            3: begin 
               numb<=byellow; 
               lampb<=1;
               countb<=4;
               end 
             
            4: begin 
               numb<=bred; 
               lampb<=4;
               countb<=0;
               end 
            default:   lampb<=8;
            endcase
            end
           else begin           
                if(numb>1)
                   if(numb[3:0]==0)
                      begin
                      numb[3:0]<=4'b1001;
                      numb[7:4]<=numb[7:4]-1;
                      end
                   else numb[3:0]<=numb[3:0]-1;
                   
                   if(numb==2) 
                    tempb<=0;
                end
      end 
      else begin
           lampb<=4'b1000;
           countb<=0;tempb<=0;
           end
    end   
endmodule