📄 xil_ycrcb2rgb_tb.mdl
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ShowName off
Period "100000"
}
Block {
BlockType Reference
Name "R"
Ports [1, 1]
Position [410, 169, 465, 191]
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes: In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
block_version "VER_STRING_GOES_HERE"
has_advanced_control "0"
sggui_pos "20,20,356,327"
block_type "gatewayout"
sg_icon_stat "55,22,1,1,white,yellow,0,f0cec300"
sg_mask_display "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this li"
"ne -- machine generated code. ');\n"
}
Block {
BlockType Reference
Name "Signal From\nWorkspace1"
Ports [0, 1]
Position [30, 153, 110, 187]
ShowName off
SourceBlock "dspsrcs4/Signal From\nWorkspace"
SourceType "Signal From Workspace"
ShowPortLabels on
X "input_image_y"
Ts "1"
nsamps "1"
OutputAfterFinalValue "Setting to zero"
ignoreOrWarnInputAndFrameLengths off
}
Block {
BlockType Reference
Name "Signal From\nWorkspace2"
Ports [0, 1]
Position [30, 198, 110, 232]
ShowName off
SourceBlock "dspsrcs4/Signal From\nWorkspace"
SourceType "Signal From Workspace"
ShowPortLabels on
X "input_image_cr"
Ts "1"
nsamps "1"
OutputAfterFinalValue "Setting to zero"
ignoreOrWarnInputAndFrameLengths off
}
Block {
BlockType Reference
Name "Signal From\nWorkspace3"
Ports [0, 1]
Position [30, 243, 110, 277]
ShowName off
SourceBlock "dspsrcs4/Signal From\nWorkspace"
SourceType "Signal From Workspace"
ShowPortLabels on
X "input_image_cb"
Ts "1"
nsamps "1"
OutputAfterFinalValue "Setting to zero"
ignoreOrWarnInputAndFrameLengths off
}
Block {
BlockType Reference
Name "Signal To\nWorkspace"
Ports [1]
Position [495, 162, 560, 198]
ShowName off
FontName "Arial"
SourceBlock "dspsnks4/Signal To\nWorkspace"
SourceType "Signal To Workspace"
ShowPortLabels on
VariableName "data_out_r"
MaxDataPoints "inf"
Decimation "1"
FrameMode "Concatenate frames (2-D array)"
FixptAsFi off
}
Block {
BlockType Reference
Name "Signal To\nWorkspace1"
Ports [1]
Position [495, 222, 560, 258]
ShowName off
FontName "Arial"
SourceBlock "dspsnks4/Signal To\nWorkspace"
SourceType "Signal To Workspace"
ShowPortLabels on
VariableName "data_out_g"
MaxDataPoints "inf"
Decimation "1"
FrameMode "Concatenate frames (2-D array)"
FixptAsFi off
}
Block {
BlockType Reference
Name "Signal To\nWorkspace2"
Ports [1]
Position [495, 283, 560, 317]
ShowName off
FontName "Arial"
SourceBlock "dspsnks4/Signal To\nWorkspace"
SourceType "Signal To Workspace"
ShowPortLabels on
VariableName "data_out_b"
MaxDataPoints "inf"
Decimation "1"
FrameMode "Concatenate frames (2-D array)"
FixptAsFi off
}
Block {
BlockType Reference
Name "Signal To\nWorkspace3"
Ports [1]
Position [495, 343, 560, 377]
ShowName off
FontName "Arial"
SourceBlock "dspsnks4/Signal To\nWorkspace"
SourceType "Signal To Workspace"
ShowPortLabels on
VariableName "v_sync"
MaxDataPoints "inf"
Decimation "1"
FrameMode "Concatenate frames (2-D array)"
FixptAsFi off
}
Block {
BlockType Reference
Name "Signal To\nWorkspace4"
Ports [1]
Position [495, 403, 560, 437]
ShowName off
FontName "Arial"
SourceBlock "dspsnks4/Signal To\nWorkspace"
SourceType "Signal To Workspace"
ShowPortLabels on
VariableName "h_sync"
MaxDataPoints "inf"
Decimation "1"
FrameMode "Concatenate frames (2-D array)"
FixptAsFi off
}
Block {
BlockType Reference
Name "Signal To\nWorkspace5"
Ports [1]
Position [495, 463, 560, 497]
ShowName off
FontName "Arial"
SourceBlock "dspsnks4/Signal To\nWorkspace"
SourceType "Signal To Workspace"
ShowPortLabels on
VariableName "h_sync5"
MaxDataPoints "inf"
Decimation "1"
FrameMode "Concatenate frames (2-D array)"
FixptAsFi off
}
Block {
BlockType Reference
Name "VS_i"
Ports [1, 1]
Position [140, 294, 195, 316]
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simu"
"link integer, double and fixed point to Xilinx fixed point type.<P><P>Hardwa"
"re notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "1"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
block_version "VER_STRING_GOES_HERE"
has_advanced_control "0"
sggui_pos "20,20,356,345"
block_type "gatewayin"
sg_icon_stat "55,22,1,1,white,yellow,0,4bb76ffd"
sg_mask_display "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
}
Block {
BlockType Reference
Name "VS_o"
Ports [1, 1]
Position [410, 349, 465, 371]
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes: In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
block_version "VER_STRING_GOES_HERE"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
sg_icon_stat "55,22,1,1,white,yellow,0,f0cec300"
sg_mask_display "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this li"
"ne -- machine generated code. ');\n"
}
Block {
BlockType Reference
Name "Y"
Ports [1, 1]
Position [140, 159, 195, 181]
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simu"
"link integer, double and fixed point to Xilinx fixed point type.<P><P>Hardwa"
"re notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "10"
bin_pt "2"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "1"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
block_version "VER_STRING_GOES_HERE"
has_advanced_control "0"
sggui_pos "20,20,356,414"
block_type "gatewayin"
sg_icon_stat "55,22,1,1,white,yellow,0,4bb76ffd"
sg_mask_display "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
}
Block {
BlockType Reference
Name "en_i"
Ports [1, 1]
Position [140, 429, 195, 451]
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simu"
"link integer, double and fixed point to Xilinx fixed point type.<P><P>Hardwa"
"re notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "1"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
block_version "VER_STRING_GOES_HERE"
has_advanced_control "0"
sggui_pos "20,20,356,345"
block_type "gatewayin"
sg_icon_stat "55,22,1,1,white,yellow,0,4bb76ffd"
sg_mask_display "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
}
Block {
BlockType Reference
Name "rst_i"
Ports [1, 1]
Position [140, 474, 195, 496]
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simu"
"link integer, double and fixed point to Xilinx fixed point type.<P><P>Hardwa"
"re notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "1"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
block_version "VER_STRING_GOES_HERE"
has_advanced_control "0"
sggui_pos "20,20,356,345"
block_type "gatewayin"
sg_icon_stat "55,22,1,1,white,yellow,0,4bb76ffd"
sg_mask_display "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65])
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