loopback.drc

Xilinx的培训教程的源码 virtex

INFO:PhysDesignRules:772 - To achieve optimal frequency synthesis performance
   with the CLKFX and CLKFX180 outputs of the DCM comp
   Inst_my_dcm/DCM_INST/Inst_my_dcm/DCM_INST, consult the device Interactive
   Data Sheet.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/shift_result<5> is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/shift_result<7> is not placed.
ERROR:PhysDesignRules:794 - Component transmit/kcuart/Tx_stop is not placed.
ERROR:PhysDesignRules:794 - Component receive/fifo_write is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/flag_write is not placed.
ERROR:PhysDesignRules:794 - Component baud_count<5> is not placed.
ERROR:PhysDesignRules:794 - Component receive/kcuart/start_bit is not placed.
ERROR:PhysDesignRules:794 - Component transmit/kcuart/Tx_run is not placed.
ERROR:PhysDesignRules:794 - Component receive/uart_data_out<1> is not placed.
ERROR:PhysDesignRules:794 - Component receive/uart_data_out<3> is not placed.
ERROR:PhysDesignRules:794 - Component receive/uart_data_out<5> is not placed.
ERROR:PhysDesignRules:794 - Component receive/uart_data_out<7> is not placed.
ERROR:PhysDesignRules:794 - Component receive/kcuart/valid_reg_delay<8> is not
   placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/shift_carry is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/logical_result<1> is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/logical_result<2> is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/logical_result<7> is not placed.
ERROR:PhysDesignRules:794 - Component read_strobe is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/register_write is not placed.
ERROR:PhysDesignRules:794 - Component receive/kcuart/purge is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/sel_group is not placed.
ERROR:PhysDesignRules:794 - Component baud_count<8> is not placed.
ERROR:PhysDesignRules:794 - Component transmit/buf/full is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/flag_enable is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/stack_address<4> is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/t_state is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/reset_delay is not placed.
ERROR:PhysDesignRules:794 - Component my_kcpsm3/internal_reset is not placed.
ERROR:PhysDesignRules:794 - Component baud_count<4> is not placed.
ERROR:PhysDesignRules:794 - Component baud_count<1> is not placed.
ERROR:PhysDesignRules - <148> unplaced comp messages were not reported.
ERROR:Bitgen:25 - DRC detected 178 errors and 0 warnings.