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来自「Xilinx的培训教程的源码 virtex」· 代码 · 共 13 行

# Reading C:/Modeltech_6.0b/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.0b Dec  1 2004 
# //
# //  Copyright Mentor Graphics Corporation 2004
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
#  OpenFile "C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/verilog/lab2/uart_clock.v"