📄 spi_prog.psm
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CALL SPI_FLASH_tx_rx ;transmit instruction
LOAD s2, s9 ;Transmit 24-bit address [s9,s8,s7].
CALL SPI_FLASH_tx_rx
LOAD s2, s8
CALL SPI_FLASH_tx_rx
LOAD s2, s7
CALL SPI_FLASH_tx_rx
XOR s0, SPI_rom_cs ;deselect (High) FLASH
OUTPUT s0, SPI_control_port
STORE s0, SPI_control_status ;preserve status
sector_erase_wait: CALL read_spi_flash_status ;test WIP bit until finished
TEST s2, 01
JUMP NZ, sector_erase_wait
RETURN
;
;
;
;Bulk erase the whole SPI FLASH memory (ST type M25P16)
;
;Sets the WREN instruction and then transmits instruction C7 hex.
;A bulk erase can take up to 40 seconds to complete. The routine therefore reads the
;FLASH status and tests the write in progress (WIP) bit to test for completion
;
bulk_erase_spi: CALL set_spi_flash_WREN ;set write enable mode
CALL SPI_init ;ensure known state of bus and s0 register
XOR s0, SPI_rom_cs ;select (Low) FLASH
OUTPUT s0, SPI_control_port
STORE s0, SPI_control_status ;preserve status
LOAD s2, C7 ;Sector erase mode
CALL SPI_FLASH_tx_rx ;transmit instruction
XOR s0, SPI_rom_cs ;deselect (High) FLASH
OUTPUT s0, SPI_control_port
STORE s0, SPI_control_status ;preserve status
bulk_erase_wait: CALL read_spi_flash_status ;test WIP bit until finished
TEST s2, 01
JUMP NZ, bulk_erase_wait
RETURN
;
;
;
;Open a page for programming.
;The 24-bit start address to be supplied in the register set [s9,s8,s7].
;Note that s7=00 hex for normal page boundaries but you could start at any address.
;Caution : Exceeding s7=FF hex will result in the roll over to 00 hex but without
;incrementing to the next page.
;
;Transmits instruction 02hex followed by the 24-bit start address.
;It is then ready to transmit data bytes using the s2 register and the SPI_FLASH_tx_rx
;subroutine. After transmitting bytes, close the page with the close_prog_page_spi
;routine.
;
open_prog_page_spi: CALL set_spi_flash_WREN ;set write enable mode
CALL SPI_init ;ensure known state of bus and s0 register
XOR s0, SPI_rom_cs ;select (Low) FLASH
OUTPUT s0, SPI_control_port
STORE s0, SPI_control_status ;preserve status
LOAD s2, 02 ;Page program mode
CALL SPI_FLASH_tx_rx ;transmit instruction
LOAD s2, s9 ;Transmit 24-bit address [s9,s8,s7].
CALL SPI_FLASH_tx_rx
LOAD s2, s8
CALL SPI_FLASH_tx_rx
LOAD s2, s7
CALL SPI_FLASH_tx_rx
RETURN
;
;
;This routine completes a page program operation started with
;open_prog_page_spi and data bytes sent with SPI_FLASH_tx_rx.
;
;A page program can take up to 5ms to complete. The routine therefore reads the
;FLASH status and tests the write in progress (WIP) bit to test for completion
;
;
close_prog_page_spi: FETCH s0, SPI_control_status ;read control status bits
XOR s0, SPI_rom_cs ;deselect (High) FLASH
OUTPUT s0, SPI_control_port
STORE s0, SPI_control_status ;preserve status
page_prog_wait: CALL read_spi_flash_status ;test WIP bit until finished
TEST s2, 01
JUMP NZ, page_prog_wait
RETURN
;
;**************************************************************************************
;Software delay routines
;**************************************************************************************
;
;
;
;Delay of 1us.
;
;Constant value defines reflects the clock applied to KCPSM3. Every instruction
;executes in 2 clock cycles making the calculation highly predictable. The '6' in
;the following equation even allows for 'CALL delay_1us' instruction in the initiating code.
;
; delay_1us_constant = (clock_rate - 6)/4 Where 'clock_rate' is in MHz
;
;Registers used s0
;
delay_1us: LOAD s0, delay_1us_constant
wait_1us: SUB s0, 01
JUMP NZ, wait_1us
RETURN
;
;Delay of 40us.
;
;Registers used s0, s1
;
delay_40us: LOAD s1, 28 ;40 x 1us = 40us
wait_40us: CALL delay_1us
SUB s1, 01
JUMP NZ, wait_40us
RETURN
;
;
;Delay of 1ms.
;
;Registers used s0, s1, s2
;
delay_1ms: LOAD s2, 19 ;25 x 40us = 1ms
wait_1ms: CALL delay_40us
SUB s2, 01
JUMP NZ, wait_1ms
RETURN
;
;Delay of 20ms.
;
;Delay of 20ms used during initialisation.
;
;Registers used s0, s1, s2, s3
;
delay_20ms: LOAD s3, 14 ;20 x 1ms = 20ms
wait_20ms: CALL delay_1ms
SUB s3, 01
JUMP NZ, wait_20ms
RETURN
;
;Delay of approximately 1 second.
;
;Registers used s0, s1, s2, s3, s4
;
delay_1s: LOAD s4, 14 ;50 x 20ms = 1000ms
wait_1s: CALL delay_20ms
SUB s4, 01
JUMP NZ, wait_1s
RETURN
;
;**************************************************************************************
;UART communication routines
;**************************************************************************************
;
;Read one character from the UART
;
;Character read will be returned in a register called 'UART_data'.
;
;The routine first tests the receiver FIFO buffer to see if data is present.
;If the FIFO is empty, the routine waits until there is a character to read.
;As this could take any amount of time the wait loop could include a call to a
;subroutine which performs a useful function.
;
;If the received character is an XOFF, then the routine will then wait
;for an XON to be received. This means that the rest of the program is held
;in suspense and therefore it can not transmit. Once an XON is received, it will
;again wait for a normal character before returning.
;
;NOTE: Characters between the XOFF and XON will be ignored in this version of the
;program!!!
;
;Interrupt is disabled during this routine to prevent a false situation. If the
;receiver half-full flag went High it should result in an interrupt transmitting
;an XOFF character. However, if this routine were able to read the receiver buffer
;at just about the same as the hardware detects the half-full flag, then it could
;think that an XON needs to be transmitted.
;
;
;Registers used s0 and UART_data
;
read_from_UART: DISABLE INTERRUPT
wait_Rx_character: INPUT s0, status_port ;test Rx_FIFO buffer
TEST s0, rx_data_present
JUMP NZ, read_character
JUMP wait_Rx_character
read_character: INPUT UART_data, UART_read_port ;read from FIFO
COMPARE UART_data, character_XOFF ;test for XOFF
JUMP Z, wait_XON
ENABLE INTERRUPT ;normal finish
RETURN
wait_XON: INPUT s0, status_port ;test Rx_FIFO buffer
TEST s0, rx_data_present
JUMP NZ, read_XON
JUMP wait_XON
read_XON: INPUT UART_data, UART_read_port ;read from FIFO
COMPARE UART_data, character_XON ;test for XON
JUMP Z, wait_Rx_character ;now wait for normal character
JUMP wait_XON ;continue to wait for XON
;
;
;
;Transmit one character to the UART
;
;Character supplied in register called 'UART_data'.
;
;The routine first tests the transmit FIFO buffer is empty.
;If the FIFO currently has any data, the routine waits until it is empty.
;Ultimately this means that only one character is sent at a time which
;could be important if the PC at the other end of the link transmits
;an XOFF and needs the flow of data to terminate as soon as possible.
;
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