ads1241drv.h

TI SPI接口 24bit ADC ADS1241 8051 C语言驱动

#include "ioCC2430.h"

#define CS                 P1_4       // UART1 Slave chip enable Pin,Active Low(P1_4,P1_5,P1_6,P1_7 are assigned for SPI ALT2
#define ADS1241_DataReady  P1_3       // ADS1241 DataReady ,Falling edge Active
#define EX1EN              P0_1       // CC2430 PIN12  Channel 1 Exc Enable
#define EX2EN              P0_0        // CC2430 PIN11 Channel 2 Exc Enable
#define EX3EN              P1_2        // CC2430 PIN6  Channel 3 Exc Enable
#define BATT_STATUS        P1_1        // CC2430 PIN8  TPS62111 Battery Voltage Status

#define CH1EXEN      { EX1EN = 1; EX2EN = 0; EX3EN = 0; }
#define CH2EXEN      { EX1EN = 0; EX2EN = 1; EX3EN = 0; }
#define CH3EXEN      { EX1EN = 0; EX2EN = 0; EX3EN = 1; }
#define CHEXDIS      { EX1EN = 0; EX2EN = 0; EX3EN = 0; }
#define CHEXENA      { EX1EN = 1; EX2EN = 1; EX3EN = 1; }

union ADC_Data{
  unsigned char buf[4];
  signed long dat;

}; // CC2430 is big endian, means buf[0] stores the LSB, buf[3] stores MSB
struct CHINFO{
  unsigned char available;          // boolean variable,TURE if have sensor,FALSE if no sensor
  unsigned char type;               // Half Bridge or FULL Bridge
  union ADC_Data iniData;              // unbalanced data
  union ADC_Data Data;
};
/* Battery Voltage Status */
#define BATT_LOW          0x01     // Battery lower than 9.0V
#define BATT_HIGH         0x00     // Battery voltage between 9V-12V
/*  Bridge Type MASK */
#define FULL              0x01
#define NEGHALF           0x02
#define POSHALF           0x03

/* Test Type */
#define UNBALANCE         0x01
#define BALANCE           0x02
// Fosc=2.4576M Hz,Tosc=0.4uS  DRDY=15Hz  Tdrdy=1/15 second
// ADS1241 SPI Clock <=0.4 M Hz
// CS1241 Commands

#define  CS1241_RDATA     0x01	   //Delay 50 * Tosc	 after send this command
#define  CS1241_RDATAC    0x03	   // Delay 50* Tosc
#define  CS1241_STOPC     0x0F	   // Delay 4* Tosc
#define  CS1241_RREG      0x10	   // Delay 50* Tosc
#define  CS1241_WREG      0x50	   // Delay 50* Tosc
#define  CS1241_CALSELF   0xF0	   // Delay 15* Tdrdy
#define  CS1241_OCALSELF  0xF1	   //Delay 8 * Tdrdy
#define  CS1241_GCALSELF  0xF2	    //Delay 8 * Tdrdy
#define  CS1241_OCALSYS   0xF3		 //Delay 8 * Tdrdy
#define  CS1241_GCALSYS   0xF4		 //Delay 8 * Tdrdy
#define  CS1241_WAKEUP    0xFB		 //Delay 4 * Tosc
#define  CS1241_SYNC      0xFC		 //Delay 4 * Tosc
#define  CS1241_SLEEP     0xFD		//Delay 4 * Tosc
#define  CS1241_RESET     0xFE		//Delay 16 * Tosc


//CS1241 Registers

#define CS1241_SETUP      0x00	 //Def: ID3	ID2 ID1 ID0 BOCS PGA2 PGA1 PGA0     Default: xxxx0000//
#define CS1241_MUX        0x01	 //Def: PS3 PS2 PS1 PS0 NS3  NS2  NS1  NS0      Default: 0x01//
#define CS1241_ACR        0x02	 //Def: DRDY U/B SPEED BUF BITOR RAN DR1 DR0    Default: 0x00//
#define CS1241_ODAC       0x03	 //Def: SIGN OFST6 ......................OFST0  Default: 0x00//
#define CS1241_DIO        0x04	 //Def: DIO7.............................DIO0   Default: 0x00//
#define CS1241_DIR        0x05	 //Def: DIR7.............................DIR0   Default: 0xFF//
#define CS1241_IOCON      0x06	 //Def: IOCON7...........................IOCON0 Default: 0x00 //
#define CS1241_OCC0       0x07	 //Def: OCC07............................OCC00  Default: 0x00//
#define CS1241_OCC1       0x08	 //Def: OCC15............................OCC08  Default: 0x00//
#define CS1241_OCC2       0x09	 //Def: OCC23............................OCC16  Default: 0x00//
#define CS1241_GCC0       0x0A	 //Def: GCC07............................GCC00  Default: 0x00//
#define CS1241_GCC1       0x0B	 //Def: GCC15............................GCC08  Default: 0x00//
#define CS1241_GCC2       0x0C	 //Def: GCC23............................GCC16  Default: 0x00//
#define CS1241_DOR2       0x0D	 //Def: DOR23............................DOR16  Default: 0x00//
#define CS1241_DOR1       0x0E	 //Def: DOR15............................DOR08  Default: 0x00//
#define CS1241_DOR0       0x0F	 //Def: DOR07............................DOR00  Default: 0x00//

/* CS1241_SETUP Register bit Mask */
#define BDMASK            0x08   // CS1241_SETUP register BurnOut Current Source
#define GAIN128           0x07
#define GAIN64            0x06
#define GAIN32            0x05
#define GAIN16            0x04
#define GAIN8             0x03
#define GAIN4             0x02
#define GAIN2             0x01
#define GAIN1             0x00

/* CS1241_ACR Register Data output Setting Fosc=2.4576MHz,ACR.5=0(speed=0)*/
#define DR15              0x00   //15Hz
#define DR07              0x01   //7.5Hz
#define DR03              0x10   //3.75Hz
#define DRResv            0x11   // undefined,for reserved

/***** ADS1241_MUX Register bit MASK ( ADS1241 MUX is different than CS1241 MUX in AIN PIN assignment******/
/****positive input*****/

#define CH1P               0x10  // Channel 1  input+   assigned to AIN1   ADS1241 P12
#define CH2P               0x50  // Channel 2  input+   assigned to AIN5   ADS1241 P14
#define CH3P               0x20  // Channel 3  input+   assigned to AIN2   ADS1241 P17

/****Negative input****/
#define CH1N               0x00  // Channel 1  input-   assigned to AIN0   ADS1241 P11
#define CH2N               0x04  // Channel 2  input-   assigned to AIN4   ADS1241 P13
#define CH3N               0x03  // Channel 3  input-   assigned to AIN3   ADS1241 P18
#define CHCOMN             0x08  // COMMON　input- assigned to AINCOM      ADS1241 P19

/******ADS1241_DIO Register bit MASK*********/
#define CH1SEL             0x00  // Channel 1 select
#define CH2SEL             0x80  // Channel 2 select
#define CH3SEL             0x40  // Channel 3 select


void CS1241_SndComm(unsigned char CMD, unsigned char RegName, unsigned char RegValue);
unsigned char CS1241_ReadReg(unsigned char RegName);
void CS1241_Setup(void);
void CS1241_SetChannel(char ChanNum, char Btype);

signed long CS1241_ADC(void);
signed long CS1241_GetData(void);
void CS1241_ValidateChan(void);
signed long CS1241_ScanChan(char ChanNum);
void CS1241_Sleep(void);
void CS1241_WakeUp(void);
void CS1241_DoTest(char TestType);