📄 hanmin.fit.qmsg
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{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_FOOTER" "" "Info: Finished processing fast register assignments" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_PACKING" "" "Info: Finished moving registers into LUTs" { } { } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" { } { } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "19 unused 3.30 4 15 0 " "Info: Number of I/O pins in group: 19 (unused VREF, 3.30 VCCIO, 4 input, 15 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." { } { } 0} } { } 0} } { } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 0 38 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 38 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 42 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 42 pins available" { } { } 0} } { } 0} } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" { } { } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "7.234 ns pin pin " "Info: Estimated most critical path is pin to pin delay of 7.234 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns din\[3\] 1 PIN PIN_6 5 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_6; Fanout = 5; PIN Node = 'din\[3\]'" { } { { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { din[3] } "NODE_NAME" } "" } } { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 -24 144 104 "din\[3..0\]" "" } } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.289 ns) + CELL(0.914 ns) 4.335 ns hanmin_cd:inst\|hamout\[6\] 2 COMB LAB_X5_Y4 1 " "Info: 2: + IC(2.289 ns) + CELL(0.914 ns) = 4.335 ns; Loc. = LAB_X5_Y4; Fanout = 1; COMB Node = 'hanmin_cd:inst\|hamout\[6\]'" { } { { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "3.203 ns" { din[3] hanmin_cd:inst|hamout[6] } "NODE_NAME" } "" } } { "hanmin_cd.vhd" "" { Text "F:/hanmin/hanmin_cd.vhd" 11 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.577 ns) + CELL(2.322 ns) 7.234 ns cdout\[1\] 3 PIN PIN_87 0 " "Info: 3: + IC(0.577 ns) + CELL(2.322 ns) = 7.234 ns; Loc. = PIN_87; Fanout = 0; PIN Node = 'cdout\[1\]'" { } { { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "2.899 ns" { hanmin_cd:inst|hamout[6] cdout[1] } "NODE_NAME" } "" } } { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.368 ns 60.38 % " "Info: Total cell delay = 4.368 ns ( 60.38 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.866 ns 39.62 % " "Info: Total interconnect delay = 2.866 ns ( 39.62 % )" { } { } 0} } { { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "7.234 ns" { din[3] hanmin_cd:inst|hamout[6] cdout[1] } "NODE_NAME" } "" } } } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" { } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Dec 02 13:12:12 2006 " "Info: Processing ended: Sat Dec 02 13:12:12 2006" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" { } { } 0} } { } 0}
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