hanmin.fit.qmsg

4位汉明编译码源代码。VHDL格式

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Dec 02 13:12:09 2006 " "Info: Processing started: Sat Dec 02 13:12:09 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off hanmin -c hanmin " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off hanmin -c hanmin" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "hanmin EPM240T100C5 " "Info: Selected device EPM240T100C5 for design \"hanmin\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_STANDARD_FIT_COMPILATION_ON" "" "Info: Fitter is performing a Standard Fit compilation using maximum Fitter effort to optimize design performance" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM240T100I5 " "Info: Device EPM240T100I5 is compatible" {  } {  } 2} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T100C5 " "Info: Device EPM570T100C5 is compatible" {  } {  } 2} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T100I5 " "Info: Device EPM570T100I5 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "19 19 " "Info: No exact pin location assignment(s) for 19 pins of 19 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "sec " "Info: Pin sec not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 288 464 640 304 "sec" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sec" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { sec } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { sec } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ded " "Info: Pin ded not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 304 464 640 320 "ded" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ded" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { ded } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { ded } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ne " "Info: Pin ne not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 320 464 640 336 "ne" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ne" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { ne } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { ne } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[7\] " "Info: Pin cdout\[7\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[7\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[7] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[6\] " "Info: Pin cdout\[6\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[6\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[6] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[5\] " "Info: Pin cdout\[5\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[5\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[5] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[4\] " "Info: Pin cdout\[4\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[4\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[4] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[3\] " "Info: Pin cdout\[3\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[3\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[3] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[2\] " "Info: Pin cdout\[2\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[2\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[2] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[1\] " "Info: Pin cdout\[1\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[1\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[1] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "cdout\[0\] " "Info: Pin cdout\[0\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 464 640 104 "cdout\[7..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "cdout\[0\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { cdout[0] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { cdout[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[3\] " "Info: Pin dout\[3\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 272 464 640 288 "dout\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[3\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { dout[3] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { dout[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[2\] " "Info: Pin dout\[2\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 272 464 640 288 "dout\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[2\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { dout[2] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { dout[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[1\] " "Info: Pin dout\[1\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 272 464 640 288 "dout\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[1\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { dout[1] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { dout[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[0\] " "Info: Pin dout\[0\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 272 464 640 288 "dout\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[0\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { dout[0] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { dout[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[3\] " "Info: Pin din\[3\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 -24 144 104 "din\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "din\[3\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { din[3] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { din[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[2\] " "Info: Pin din\[2\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 -24 144 104 "din\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "din\[2\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { din[2] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { din[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[1\] " "Info: Pin din\[1\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 -24 144 104 "din\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "din\[1\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { din[1] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { din[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "din\[0\] " "Info: Pin din\[0\] not assigned to an exact location on the device" {  } { { "hanmin.bdf" "" { Schematic "F:/hanmin/hanmin.bdf" { { 88 -24 144 104 "din\[3..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "din\[0\]" } } } } { "F:/hanmin/db/hanmin_cmp.qrpt" "" { Report "F:/hanmin/db/hanmin_cmp.qrpt" Compiler "hanmin" "UNKNOWN" "V1" "F:/hanmin/db/hanmin.quartus_db" { Floorplan "F:/hanmin/" "" "" { din[0] } "NODE_NAME" } "" } } { "F:/hanmin/hanmin.fld" "" { Floorplan "F:/hanmin/hanmin.fld" "" "" { din[0] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tsu 2.0 ns " "Info: Assuming a global tsu requirement of 2.0 ns" {  } {  } 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tco 1.0 ns " "Info: Assuming a global tco requirement of 1.0 ns" {  } {  } 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tpd 1.0 ns " "Info: Assuming a global tpd requirement of 1.0 ns" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_LUT_PACKING" "" "Info: Moving registers into LUTs to improve timing and density" {  } {  } 0}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_HEADER" "" "Info: Started processing fast register assignments" {  } {  } 0}