📄 firstgdf.rpt
字号:
Device-Specific Information:d:\ygcfile1\se-5m\test\file\top(sch)\first\firstgdf.rpt
firstgdf
** INPUTS **
Fan-In Fan-Out
Pin LC EC Row Col Primitive Code INP FBK OUT FBK Name
1 - - - -- INPUT G 0 0 0 0 clk
28 - - C -- INPUT 0 0 0 2 k0
29 - - C -- INPUT 0 0 0 2 k1
30 - - C -- INPUT 0 0 0 2 k2
35 - - - 06 INPUT 0 0 0 2 k3
39 - - - 11 INPUT 0 0 0 70 reset
47 - - - 14 INPUT 0 0 0 37 start
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
G = Global Source. Fan-out destinations counted here do not include destinations
that are driven using global routing resources. Refer to the Auto Global Signals,
Clock Signals, Clear Signals, Synchronous Load Signals, and Synchronous Clear Signals
Sections of this Report File for information on which signals' fan-outs are used as
Clock, Clear, Preset, Output Enable, and synchronous Load signals.
Device-Specific Information:d:\ygcfile1\se-5m\test\file\top(sch)\first\firstgdf.rpt
firstgdf
** OUTPUTS **
Fed By Fed By Fan-In Fan-Out
Pin LC EC Row Col Primitive Code INP FBK OUT FBK Name
72 - - A -- OUTPUT 0 1 0 0 count0
73 - - A -- OUTPUT 0 1 0 0 count1
78 - - - 24 OUTPUT 0 1 0 0 count2
79 - - - 24 OUTPUT 0 1 0 0 count3
80 - - - 23 OUTPUT 0 1 0 0 count4
81 - - - 22 OUTPUT 0 1 0 0 count5
83 - - - 13 OUTPUT 0 1 0 0 count6
3 - - - 12 OUTPUT 0 1 0 0 count7
6 - - - 04 OUTPUT 0 1 0 0 firstman0
7 - - - 03 OUTPUT 0 1 0 0 firstman1
8 - - - 03 OUTPUT 0 1 0 0 firstman2
23 - - B -- OUTPUT 0 1 0 0 l14
24 - - B -- OUTPUT 0 1 0 0 l15
25 - - B -- OUTPUT 0 1 0 0 l16
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information:d:\ygcfile1\se-5m\test\file\top(sch)\first\firstgdf.rpt
firstgdf
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 7 - C 13 OR2 0 3 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry2
- 3 - C 11 OR2 0 3 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry4
- 1 - C 02 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry6
- 5 - B 09 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry7
- 2 - B 07 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry9
- 7 - C 10 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry10
- 1 - C 10 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry12
- 8 - B 04 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry13
- 1 - B 04 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry15
- 8 - C 12 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry16
- 2 - C 12 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry18
- 3 - B 09 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry19
- 1 - B 12 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry21
- 8 - B 10 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry22
- 4 - B 10 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry24
- 8 - B 18 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry25
- 2 - B 18 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry27
- 8 - B 15 OR2 0 2 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry28
- 1 - B 15 OR2 0 3 0 5 |CNT20:16|LPM_ADD_SUB:672|addcore:adder|pcarry30
- 4 - C 23 OR2 0 3 0 3 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry2
- 2 - C 13 OR2 0 3 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry4
- 4 - C 20 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry6
- 1 - C 20 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry7
- 5 - B 17 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry9
- 4 - B 17 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry10
- 5 - A 17 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry12
- 1 - A 17 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry13
- 2 - A 13 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry15
- 1 - A 13 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry16
- 2 - A 08 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry18
- 1 - A 08 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry19
- 2 - A 09 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry21
- 1 - A 09 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry22
- 4 - A 05 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry24
- 1 - A 05 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry25
- 5 - A 20 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry27
- 1 - A 20 OR2 0 4 0 4 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry28
- 5 - A 18 OR2 0 3 0 1 |CNT20:16|LPM_ADD_SUB:1287|addcore:adder|pcarry30
- 4 - A 18 DFFE + 2 2 0 1 |CNT20:16|TMP131 (|CNT20:16|:19)
- 2 - A 18 DFFE + 2 2 0 3 |CNT20:16|TMP130 (|CNT20:16|:20)
- 1 - A 18 DFFE + 2 2 0 4 |CNT20:16|TMP129 (|CNT20:16|:21)
- 4 - A 20 DFFE + 2 2 0 2 |CNT20:16|TMP128 (|CNT20:16|:22)
- 3 - A 20 DFFE + 2 2 0 3 |CNT20:16|TMP127 (|CNT20:16|:23)
- 2 - A 20 DFFE + 2 2 0 4 |CNT20:16|TMP126 (|CNT20:16|:24)
- 3 - A 05 DFFE + 2 2 0 2 |CNT20:16|TMP125 (|CNT20:16|:25)
- 2 - A 05 DFFE + 2 2 0 3 |CNT20:16|TMP124 (|CNT20:16|:26)
- 5 - A 05 DFFE + 2 2 0 4 |CNT20:16|TMP123 (|CNT20:16|:27)
- 3 - A 09 DFFE + 2 2 0 2 |CNT20:16|TMP122 (|CNT20:16|:28)
- 5 - A 09 DFFE + 2 2 0 3 |CNT20:16|TMP121 (|CNT20:16|:29)
- 4 - A 09 DFFE + 2 2 0 4 |CNT20:16|TMP120 (|CNT20:16|:30)
- 5 - A 08 DFFE + 2 2 0 2 |CNT20:16|TMP119 (|CNT20:16|:31)
- 4 - A 08 DFFE + 2 2 0 3 |CNT20:16|TMP118 (|CNT20:16|:32)
- 3 - A 08 DFFE + 2 2 0 4 |CNT20:16|TMP117 (|CNT20:16|:33)
- 5 - A 13 DFFE + 2 2 0 2 |CNT20:16|TMP116 (|CNT20:16|:34)
- 4 - A 13 DFFE + 2 2 0 3 |CNT20:16|TMP115 (|CNT20:16|:35)
- 3 - A 13 DFFE + 2 2 0 4 |CNT20:16|TMP114 (|CNT20:16|:36)
- 4 - A 17 DFFE + 2 2 0 2 |CNT20:16|TMP113 (|CNT20:16|:37)
- 3 - A 17 DFFE + 2 2 0 3 |CNT20:16|TMP112 (|CNT20:16|:38)
- 2 - A 17 DFFE + 2 2 0 4 |CNT20:16|TMP111 (|CNT20:16|:39)
- 3 - B 17 DFFE + 2 2 0 2 |CNT20:16|TMP110 (|CNT20:16|:40)
- 2 - B 17 DFFE + 2 2 0 3 |CNT20:16|TMP19 (|CNT20:16|:41)
- 1 - B 17 DFFE + 2 2 0 4 |CNT20:16|TMP18 (|CNT20:16|:42)
- 8 - C 20 DFFE + 2 2 0 2 |CNT20:16|TMP17 (|CNT20:16|:43)
- 3 - C 20 DFFE + 2 2 0 3 |CNT20:16|TMP16 (|CNT20:16|:44)
- 2 - C 20 DFFE + 2 2 0 4 |CNT20:16|TMP15 (|CNT20:16|:45)
- 3 - C 13 DFFE + 2 2 0 2 |CNT20:16|TMP14 (|CNT20:16|:46)
- 2 - C 23 DFFE + 2 2 1 3 |CNT20:16|TMP13 (|CNT20:16|:47)
- 1 - C 23 DFFE + 2 2 1 2 |CNT20:16|TMP12 (|CNT20:16|:48)
- 1 - A 16 DFFE + 2 2 1 3 |CNT20:16|TMP11 (|CNT20:16|:49)
- 3 - A 16 DFFE + 2 2 1 4 |CNT20:16|TMP10 (|CNT20:16|:50)
- 2 - B 19 DFFE + 1 3 0 2 |CNT20:16|tmp231 (|CNT20:16|:51)
- 4 - B 15 DFFE + 1 3 0 1 |CNT20:16|tmp230 (|CNT20:16|:52)
- 3 - B 15 DFFE + 1 3 0 2 |CNT20:16|tmp229 (|CNT20:16|:53)
- 2 - B 15 DFFE + 1 3 0 1 |CNT20:16|tmp228 (|CNT20:16|:54)
- 4 - B 18 DFFE + 1 3 0 1 |CNT20:16|tmp227 (|CNT20:16|:55)
- 1 - B 18 DFFE + 1 3 0 2 |CNT20:16|tmp226 (|CNT20:16|:56)
- 3 - B 18 DFFE + 1 3 0 1 |CNT20:16|tmp225 (|CNT20:16|:57)
- 1 - B 10 DFFE + 1 3 0 1 |CNT20:16|tmp224 (|CNT20:16|:58)
- 2 - B 10 DFFE + 1 3 0 2 |CNT20:16|tmp223 (|CNT20:16|:59)
- 3 - B 10 DFFE + 1 3 0 1 |CNT20:16|tmp222 (|CNT20:16|:60)
- 2 - B 12 DFFE + 1 3 0 1 |CNT20:16|tmp221 (|CNT20:16|:61)
- 3 - B 12 DFFE + 1 3 0 2 |CNT20:16|tmp220 (|CNT20:16|:62)
- 2 - B 09 DFFE + 1 3 0 1 |CNT20:16|tmp219 (|CNT20:16|:63)
- 4 - C 12 DFFE + 1 3 0 1 |CNT20:16|tmp218 (|CNT20:16|:64)
- 3 - C 12 DFFE + 1 3 0 2 |CNT20:16|tmp217 (|CNT20:16|:65)
- 1 - C 12 DFFE + 1 3 0 1 |CNT20:16|tmp216 (|CNT20:16|:66)
- 4 - B 04 DFFE + 1 3 0 1 |CNT20:16|tmp215 (|CNT20:16|:67)
- 3 - B 04 DFFE + 1 3 0 2 |CNT20:16|tmp214 (|CNT20:16|:68)
- 2 - B 04 DFFE + 1 3 0 1 |CNT20:16|tmp213 (|CNT20:16|:69)
- 4 - C 10 DFFE + 1 3 0 1 |CNT20:16|tmp212 (|CNT20:16|:70)
- 3 - C 10 DFFE + 1 3 0 2 |CNT20:16|tmp211 (|CNT20:16|:71)
- 2 - C 10 DFFE + 1 3 0 1 |CNT20:16|tmp210 (|CNT20:16|:72)
- 3 - B 07 DFFE + 1 3 0 1 |CNT20:16|tmp29 (|CNT20:16|:73)
- 1 - B 07 DFFE + 1 3 0 2 |CNT20:16|tmp28 (|CNT20:16|:74)
- 1 - B 09 DFFE + 1 3 0 1 |CNT20:16|tmp27 (|CNT20:16|:75)
- 2 - C 02 DFFE + 1 3 0 1 |CNT20:16|tmp26 (|CNT20:16|:76)
- 3 - C 02 DFFE + 1 3 0 2 |CNT20:16|tmp25 (|CNT20:16|:77)
- 2 - C 11 DFFE + 1 3 0 1 |CNT20:16|tmp24 (|CNT20:16|:78)
- 1 - C 11 DFFE + 1 3 1 2 |CNT20:16|tmp23 (|CNT20:16|:79)
- 1 - C 13 DFFE + 1 3 1 1 |CNT20:16|tmp22 (|CNT20:16|:80)
- 2 - C 21 DFFE + ! 1 3 1 2 |CNT20:16|tmp21 (|CNT20:16|:81)
- 3 - C 23 DFFE + 1 2 1 4 |CNT20:16|tmp20 (|CNT20:16|:82)
- 5 - B 08 DFFE + 1 3 1 0 |CNT20:16|CA0 (|CNT20:16|:114)
- 3 - A 18 OR2 ! 0 4 0 5 |CNT20:16|:471
- 6 - C 23 OR2 0 4 0 1 |CNT20:16|:1849
- 4 - C 24 AND2 s 1 2 0 32 |CNT20:16|~1850~1
- 5 - B 22 OR2 0 3 0 34 |CNT20:16|:1850
- 6 - A 18 OR2 0 4 0 1 |CNT20:16|:2270
- 7 - A 18 OR2 0 3 0 1 |CNT20:16|:2276
- 6 - A 20 OR2 0 3 0 1 |CNT20:16|:2282
- 7 - A 20 OR2 0 4 0 1 |CNT20:16|:2288
- 8 - A 20 OR2 0 3 0 1 |CNT20:16|:2294
- 6 - A 05 OR2 0 3 0 1 |CNT20:16|:2300
- 7 - A 05 OR2 0 4 0 1 |CNT20:16|:2306
- 8 - A 05 OR2 0 3 0 1 |CNT20:16|:2312
- 6 - A 09 OR2 0 3 0 1 |CNT20:16|:2318
- 7 - A 09 OR2 0 4 0 1 |CNT20:16|:2324
- 8 - A 09 OR2 0 3 0 1 |CNT20:16|:2330
- 8 - A 08 OR2 0 3 0 1 |CNT20:16|:2336
- 7 - A 08 OR2 0 4 0 1 |CNT20:16|:2342
- 6 - A 08 OR2 0 3 0 1 |CNT20:16|:2348
- 6 - A 13 OR2 0 3 0 1 |CNT20:16|:2354
- 7 - A 13 OR2 0 4 0 1 |CNT20:16|:2360
- 8 - A 13 OR2 0 3 0 1 |CNT20:16|:2366
- 6 - A 17 OR2 0 3 0 1 |CNT20:16|:2372
- 7 - A 17 OR2 0 4 0 1 |CNT20:16|:2378
- 8 - A 17 OR2 0 3 0 1 |CNT20:16|:2384
- 6 - B 17 OR2 0 3 0 1 |CNT20:16|:2390
- 7 - B 17 OR2 0 4 0 1 |CNT20:16|:2396
- 8 - B 17 OR2 0 3 0 1 |CNT20:16|:2402
- 5 - C 20 OR2 0 3 0 1 |CNT20:16|:2408
- 6 - C 20 OR2 0 4 0 1 |CNT20:16|:2414
- 7 - C 20 OR2 0 3 0 1 |CNT20:16|:2420
- 5 - C 13 OR2 0 4 0 1 |CNT20:16|:2426
- 4 - C 15 AND2 s 1 1 0 29 |CNT20:16|~2438~1
- 5 - C 23 OR2 0 4 0 1 |CNT20:16|:2438
- 4 - A 16 OR2 0 3 0 1 |CNT20:16|:2444
- 1 - B 19 OR2 s 0 3 0 1 |CNT20:16|~2653~1
- 7 - B 15 OR2 s 0 4 0 1 |CNT20:16|~2659~1
- 6 - B 15 OR2 s 0 3 0 1 |CNT20:16|~2665~1
- 5 - B 15 OR2 s 0 3 0 1 |CNT20:16|~2671~1
- 5 - B 18 OR2 s 0 4 0 1 |CNT20:16|~2677~1
- 6 - B 18 OR2 s 0 3 0 1 |CNT20:16|~2683~1
- 7 - B 18 OR2 s 0 3 0 1 |CNT20:16|~2689~1
- 5 - B 10 OR2 s 0 4 0 1 |CNT20:16|~2695~1
- 6 - B 10 OR2 s 0 3 0 1 |CNT20:16|~2701~1
- 7 - B 10 OR2 s 0 3 0 1 |CNT20:16|~2707~1
- 5 - B 12 OR2 s 0 4 0 1 |CNT20:16|~2713~1
- 4 - B 12 OR2 s 0 3 0 1 |CNT20:16|~2719~1
- 4 - B 09 OR2 s 0 3 0 1 |CNT20:16|~2725~1
- 5 - C 12 OR2 s 0 4 0 1 |CNT20:16|~2731~1
- 6 - C 12 OR2 s 0 3 0 1 |CNT20:16|~2737~1
- 7 - C 12 OR2 s 0 3 0 1 |CNT20:16|~2743~1
- 5 - B 04 OR2 s 0 4 0 1 |CNT20:16|~2749~1
- 6 - B 04 OR2 s 0 3 0 1 |CNT20:16|~2755~1
- 7 - B 04 OR2 s 0 3 0 1 |CNT20:16|~2761~1
- 5 - C 10 OR2 s 0 4 0 1 |CNT20:16|~2767~1
- 6 - C 10 OR2 s 0 3 0 1 |CNT20:16|~2773~1
- 8 - C 10 OR2 s 0 3 0 1 |CNT20:16|~2779~1
- 5 - B 07 OR2 s 0 4 0 1 |CNT20:16|~2785~1
- 4 - B 07 OR2 s 0 3 0 1 |CNT20:16|~2791~1
- 6 - B 09 OR2 s 0 3 0 1 |CNT20:16|~2797~1
- 5 - C 02 OR2 s 0 4 0 1 |CNT20:16|~2803~1
- 4 - C 02 OR2 s 0 3 0 1 |CNT20:16|~2809~1
- 5 - C 11 OR2 s 0 4 0 1 |CNT20:16|~2815~1
- 4 - C 11 OR2 s 0 3 0 1 |CNT20:16|~2821~1
- 4 - C 13 OR2 s 0 4 0 1 |CNT20:16|~2827~1
- 1 - C 21 OR2 s ! 0 3 0 1 |CNT20:16|~2833~1
- 5 - B 19 OR2 s 1 2 0 33 |CNT20:16|~2839~1
- 2 - A 16 OR2 s 0 3 0 1 |CNT20:16|~3031~1
- 8 - B 05 AND2 1 1 1 0 |CNT20:16|:3209
- 4 - B 05 AND2 1 1 1 0 |CNT20:16|:3212
- 7 - C 03 DFFE 2 2 0 3 |FIRST:5|c3 (|FIRST:5|:11)
- 6 - C 03 DFFE 2 2 0 3 |FIRST:5|c2 (|FIRST:5|:12)
- 5 - C 03 DFFE 2 2 0 3 |FIRST:5|c1 (|FIRST:5|:13)
- 4 - C 03 DFFE 2 2 0 3 |FIRST:5|c0 (|FIRST:5|:14)
- 1 - C 01 DFFE 1 1 0 40 |FIRST:5|lock (|FIRST:5|:15)
- 1 - C 08 OR2 4 0 0 5 |FIRST:5|:99
- 2 - C 03 AND2 0 4 1 0 |FIRST:5|:166
- 3 - C 03 OR2 0 4 1 0 |FIRST:5|:181
- 1 - C 03 OR2 0 4 1 0 |FIRST:5|:194
Code:
s = Synthesized pin or logic cell
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -