change.pl

viterbi译码器的一种fpga实现

#!/usr/sww/bin/perl

$dir = $ARGV[0];

system "mv $dir/MS_res_acs1_0.v $dir/MS_res_ACS1_0.v";
system "mv $dir/MS_res_acs1_1.v $dir/MS_res_ACS1_1.v";
system "mv $dir/MS_res_acs2_0.v $dir/MS_res_ACS2_0.v";
system "mv $dir/MS_res_acs2_1.v $dir/MS_res_ACS2_1.v";