backtrack.v

viterbi译码器的一种fpga实现

`include "defs.h"

module backtrack(cmp,  restart,  clk, 
             bit_line);

input   [96-1:0] cmp;
input   restart,  clk;
output  [11:0] bit_line;

wire    out0000,  out0001,  out0010,  out0011,  out0020,  out0021, 
 out0030,  out0031,  out0040,  out0041,  out0050,  out0051,  out0060, 
 out0061,  out0070,  out0071, 
                 out0100,  out0101,  out0110,  out0111,  out0120, 
 out0121,  out0130,  out0131,  out0140,  out0141,  out0150,  out0151, 
 out0160,  out0161,  out0170,  out0171, 
                 out0200,  out0201,  out0210,  out0211,  out0220, 
 out0221,  out0230,  out0231,  out0240,  out0241,  out0250,  out0251, 
 out0260,  out0261,  out0270,  out0271, 
                 out0300,  out0301,  out0310,  out0311,  out0320, 
 out0321,  out0330,  out0331,  out0340,  out0341,  out0350,  out0351, 
 out0360,  out0361,  out0370,  out0371, 
                 out0400,  out0401,  out0410,  out0411,  out0420, 
 out0421,  out0430,  out0431,  out0440,  out0441,  out0450,  out0451, 
 out0460,  out0461,  out0470,  out0471, 
                 out0500,  out0501,  out0510,  out0511,  out0520, 
 out0521,  out0530,  out0531,  out0540,  out0541,  out0550,  out0551, 
 out0560,  out0561,  out0570,  out0571, 
                 out0600,  out0601,  out0610,  out0611,  out0620, 
 out0621,  out0630,  out0631,  out0640,  out0641,  out0650,  out0651, 
 out0660,  out0661,  out0670,  out0671, 
                 out0700,  out0701,  out0710,  out0711,  out0720, 
 out0721,  out0730,  out0731,  out0740,  out0741,  out0750,  out0751, 
 out0760,  out0761,  out0770,  out0771, 
                 out0800,  out0801,  out0810,  out0811,  out0820, 
 out0821,  out0830,  out0831,  out0840,  out0841,  out0850,  out0851, 
 out0860,  out0861,  out0870,  out0871, 
                 out0900,  out0901,  out0910,  out0911,  out0920, 
 out0921,  out0930,  out0931,  out0940,  out0941,  out0950,  out0951, 
 out0960,  out0961,  out0970,  out0971, 
                 out1000,  out1001,  out1010,  out1011,  out1020, 
 out1021,  out1030,  out1031,  out1040,  out1041,  out1050,  out1051, 
 out1060,  out1061,  out1070,  out1071, 
                 out1100,  out1101,  out1110,  out1111,  out1120, 
 out1121,  out1130,  out1131,  out1140,  out1141,  out1150,  out1151, 
 out1160,  out1161,  out1170,  out1171;

reg    [15:0]last_out;
always @(posedge clk) last_out = {out1100,  out1101,  out1110, 
 out1111,  out1120,  out1121,  out1130,  out1131,  out1140,  out1141, 
 out1150,  out1151,  out1160,  out1161,  out1170,  out1171};
reg del_restart;
always @(posedge clk) del_restart = restart;
wire   [15:0]first_in = del_restart == 1 ? {1'b1,  1'b0,  1'b0, 
 1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0,  1'b0, 
 1'b0} : last_out;

MS_res_stage  st0(cmp[7:0],  bit_line[0], 
         out1100,  out1111,  out1130,  out1121,  out1150,  out1141, 
 out1160,  out1171,  out1110,  out1101,  out1120,  out1131,  out1140, 
 out1151,  out1170,  out1161, 
         out0000,  out0001,  out0010,  out0011,  out0020,  out0021, 
 out0030,  out0031,  out0040,  out0041,  out0050,  out0051,  out0060, 
 out0061,  out0070,  out0071);
MS_res_stage  st1(cmp[15:8],  bit_line[1], 
         out0000,  out0011,  out0030,  out0021,  out0050,  out0041, 
 out0060,  out0071,  out0010,  out0001,  out0020,  out0031,  out0040, 
 out0051,  out0070,  out0061, 
         out0100,  out0101,  out0110,  out0111,  out0120,  out0121, 
 out0130,  out0131,  out0140,  out0141,  out0150,  out0151,  out0160, 
 out0161,  out0170,  out0171);
MS_res_stage  st2(cmp[23:16],  bit_line[2], 
         out0100,  out0111,  out0130,  out0121,  out0150,  out0141, 
 out0160,  out0171,  out0110,  out0101,  out0120,  out0131,  out0140, 
 out0151,  out0170,  out0161, 
         out0200,  out0201,  out0210,  out0211,  out0220,  out0221, 
 out0230,  out0231,  out0240,  out0241,  out0250,  out0251,  out0260, 
 out0261,  out0270,  out0271);
MS_res_stage  st3(cmp[31:24],  bit_line[3], 
         out0200,  out0211,  out0230,  out0221,  out0250,  out0241, 
 out0260,  out0271,  out0210,  out0201,  out0220,  out0231,  out0240, 
 out0251,  out0270,  out0261, 
         out0300,  out0301,  out0310,  out0311,  out0320,  out0321, 
 out0330,  out0331,  out0340,  out0341,  out0350,  out0351,  out0360, 
 out0361,  out0370,  out0371);
MS_res_stage  st4(cmp[39:32],  bit_line[4], 
         out0300,  out0311,  out0330,  out0321,  out0350,  out0341, 
 out0360,  out0371,  out0310,  out0301,  out0320,  out0331,  out0340, 
 out0351,  out0370,  out0361, 
         out0400,  out0401,  out0410,  out0411,  out0420,  out0421, 
 out0430,  out0431,  out0440,  out0441,  out0450,  out0451,  out0460, 
 out0461,  out0470,  out0471);
MS_res_stage  st5(cmp[47:40],  bit_line[5], 
         out0400,  out0411,  out0430,  out0421,  out0450,  out0441, 
 out0460,  out0471,  out0410,  out0401,  out0420,  out0431,  out0440, 
 out0451,  out0470,  out0461, 
         out0500,  out0501,  out0510,  out0511,  out0520,  out0521, 
 out0530,  out0531,  out0540,  out0541,  out0550,  out0551,  out0560, 
 out0561,  out0570,  out0571);
MS_res_stage  st6(cmp[55:48],  bit_line[6], 
         out0500,  out0511,  out0530,  out0521,  out0550,  out0541, 
 out0560,  out0571,  out0510,  out0501,  out0520,  out0531,  out0540, 
 out0551,  out0570,  out0561, 
         out0600,  out0601,  out0610,  out0611,  out0620,  out0621, 
 out0630,  out0631,  out0640,  out0641,  out0650,  out0651,  out0660, 
 out0661,  out0670,  out0671);
MS_res_stage  st7(cmp[63:56],  bit_line[7], 
         out0600,  out0611,  out0630,  out0621,  out0650,  out0641, 
 out0660,  out0671,  out0610,  out0601,  out0620,  out0631,  out0640, 
 out0651,  out0670,  out0661, 
         out0700,  out0701,  out0710,  out0711,  out0720,  out0721, 
 out0730,  out0731,  out0740,  out0741,  out0750,  out0751,  out0760, 
 out0761,  out0770,  out0771);
MS_res_stage  st8(cmp[71:64],  bit_line[8], 
         out0700,  out0711,  out0730,  out0721,  out0750,  out0741, 
 out0760,  out0771,  out0710,  out0701,  out0720,  out0731,  out0740, 
 out0751,  out0770,  out0761, 
         out0800,  out0801,  out0810,  out0811,  out0820,  out0821, 
 out0830,  out0831,  out0840,  out0841,  out0850,  out0851,  out0860, 
 out0861,  out0870,  out0871);
MS_res_stage  st9(cmp[79:72],  bit_line[9], 
         out0800,  out0811,  out0830,  out0821,  out0850,  out0841, 
 out0860,  out0871,  out0810,  out0801,  out0820,  out0831,  out0840, 
 out0851,  out0870,  out0861, 
         out0900,  out0901,  out0910,  out0911,  out0920,  out0921, 
 out0930,  out0931,  out0940,  out0941,  out0950,  out0951,  out0960, 
 out0961,  out0970,  out0971);
MS_res_stage  st10(cmp[87:80],  bit_line[10], 
         out0900,  out0911,  out0930,  out0921,  out0950,  out0941, 
 out0960,  out0971,  out0910,  out0901,  out0920,  out0931,  out0940, 
 out0951,  out0970,  out0961, 
         out1000,  out1001,  out1010,  out1011,  out1020,  out1021, 
 out1030,  out1031,  out1040,  out1041,  out1050,  out1051,  out1060, 
 out1061,  out1070,  out1071);
MS_res_stage  st11(cmp[95:88],  bit_line[11], 
         out1000,  out1011,  out1030,  out1021,  out1050,  out1041, 
 out1060,  out1071,  out1010,  out1001,  out1020,  out1031,  out1040, 
 out1051,  out1070,  out1061, 
         first_in[15],  first_in[14],  first_in[13],  first_in[12], 
 first_in[11],  first_in[10],  first_in[9],  first_in[8], 
 first_in[7],  first_in[6],  first_in[5],  first_in[4],  first_in[3], 
 first_in[2],  first_in[1],  first_in[0]);

endmodule