todo
来自「viterbi译码器的一种fpga实现」· 代码 · 共 10 行
TXT
10 行
1. Automatic input/output Done2. Merge bits creating buses. Done3. Create the decoder.v file. Done4. Automatic generation of decoder.v / testing code Done5. Test different viterbi decoders whether they work Done6. Delete "id" Done7. Make it sithesizable for Maxplus Done
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