in_signal.v

viterbi译码器的一种fpga实现

    @(negedge reset)
		enc_bit01 = -4;
		enc_bit02 = -4;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = 3;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = -4;
		enc_bit11 = 3;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = -4;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = -4;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = 3;
		enc_bit02 = 3;
		enc_bit11 = -4;
		enc_bit12 = 3;
	@(posedge clk)
		enc_bit01 = -4;
		enc_bit02 = -4;