post_sim.do

16b20b编解码VHDL代码.

# 16b/20b Post Route Timing Simulation ModelSim DO file

# Create work library
vlib work

# Compile package files
vcom -just e -93 -explicit  -work work pkg_convert.vhd
vcom -skip e -93 -explicit  -work work pkg_convert.vhd
vcom -just e -93 -explicit  -work work pkg_spc_char.vhd
vcom -skip e -93 -explicit  -work work pkg_spc_char.vhd

# Compile encoder file
vcom -just e -93 -explicit  encoder_time_post.vhd
vcom -skip e -93 -explicit  encoder_time_post.vhd

# Compile decoder files
vcom -just e -93 -explicit  decoder_time_post.vhd
vcom -skip e -93 -explicit  decoder_time_post.vhd

# Compile test bench files
vcom -just e -93 -explicit  tst_bench_post.vhd
vcom -skip e -93 -explicit  tst_bench_post.vhd
vcom -just e -93 -explicit  main_tb_post.vhd
vcom -skip e -93 -explicit  main_tb_post.vhd

# Load simulation: main_tb_post
vsim -t 1ps  -L unisims  -lib work main_tb_post

# View wave window and run wave.do
view wave
do wave_post.do
view structure
view signals

# Simulation time
run 50us