encoder_time_post.vhd

16b20b编解码VHDL代码.

  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_5_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_5_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_7_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_8_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_8_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_10_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_10_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_10_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_11_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_XOR_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_377_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_377_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_377_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_377_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_1_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_2_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_3_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_10_MC_D2_PT_4_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_302_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_302_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_302_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_1_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_1_IN8 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_2_IN8 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_3_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_3_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_3_IN8 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_4_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_4_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_4_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_4_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_4_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_4_IN8 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_5_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_5_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_5_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_5_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_5_IN8 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_6_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_6_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_6_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_6_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_6_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_6_IN8 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_7_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_7_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_7_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_7_IN10 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_8_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_8_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_8_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_8_IN10 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_9_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_9_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_9_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_term_MC_D2_PT_9_IN10 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_11_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_11_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_12_MC_D2_PT_3_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_3_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_3_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_13_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_3_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_4_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_4_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_5_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_5_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_6_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_6_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_7_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_8_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_8_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_8_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_9_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_10_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_10_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_D2_PT_10_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_14_MC_XOR_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_15_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_15_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_3_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_4_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_5_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_6_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_7_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_7_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_7_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_8_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_8_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_8_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_8_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_D2_PT_8_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_e_prel_MC_XOR_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_16_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_16_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_d_prel_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_17_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_17_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_2_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_3_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_3_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_4_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_4_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_4_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_c_prel_MC_D2_PT_4_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_18_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_18_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_1_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_2_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_3_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_4_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_4_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_4_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_4_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_b_prel_MC_D2_PT_4_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_19_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_19_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_1_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_1_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_1_MC_D2_PT_1_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_2_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_2_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_2_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_2_MC_D2_PT_3_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_2_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_2_MC_D2_PT_3_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_1_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_2_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_3_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_3_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_3_MC_D2_PT_3_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_3_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_4_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_5_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_6_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_7_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_7_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_7_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_8_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_9_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_9_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_9_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_10_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_10_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_11_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_D2_PT_11_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_4_MC_XOR_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_5_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_5_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_e_prel_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_e_prel_MC_D2_PT_0_IN1 : STD_LOGIC;