encoder_time_post.vhd

16b20b编解码VHDL代码.

  signal serial_data_7_MC_D2_PT_0 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel : STD_LOGIC; 
  signal serial_data_7_MC_D2_PT_1 : STD_LOGIC; 
  signal serial_data_7_MC_D2 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_Q : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D1 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D2_PT_0 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D2_PT_1 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D2_PT_2 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D2_PT_3 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D2_PT_4 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_c_prel_MC_D2 : STD_LOGIC; 
  signal serial_data_8_MC_Q : STD_LOGIC; 
  signal serial_data_8_MC_Q_tsim_ireg_Q : STD_LOGIC; 
  signal serial_data_8_MC_D : STD_LOGIC; 
  signal serial_data_8_MC_D1 : STD_LOGIC; 
  signal serial_data_8_MC_UIM : STD_LOGIC; 
  signal serial_data_8_MC_D2_PT_0 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel : STD_LOGIC; 
  signal serial_data_8_MC_D2_PT_1 : STD_LOGIC; 
  signal serial_data_8_MC_D2 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_Q : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D1 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2_PT_0 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2_PT_1 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2_PT_2 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2_PT_3 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2_PT_4 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2_PT_5 : STD_LOGIC; 
  signal lower_enc_enc_8b_10b_b_prel_MC_D2 : STD_LOGIC; 
  signal serial_data_9_MC_Q : STD_LOGIC; 
  signal serial_data_9_MC_Q_tsim_ireg_Q : STD_LOGIC; 
  signal serial_data_9_MC_D : STD_LOGIC; 
  signal serial_data_9_MC_D1 : STD_LOGIC; 
  signal serial_data_9_MC_UIM : STD_LOGIC; 
  signal serial_data_9_MC_D2_PT_0 : STD_LOGIC; 
  signal serial_data_9_MC_D2_PT_1 : STD_LOGIC; 
  signal serial_data_9_MC_D2 : STD_LOGIC; 
  signal VCC : STD_LOGIC; 
  signal GND : STD_LOGIC; 
  signal PRLD : STD_LOGIC; 
  signal NlwInverterSignal_dis_out_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_dis_out_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_dis_out_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_dis_out_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_dis_out_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_dis_out_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_FOOBAR3_ctinst_7_OUT : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft1_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft1_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft1_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft3_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft3_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft3_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft3_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft3_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft3_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_prs_state_fft2_MC_D1_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_prs_state_fft2_MC_D2_PT_0_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_prs_state_fft2_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_prs_state_fft2_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_prs_state_fft1_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_226_MC_D1_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_226_MC_D1_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft2_MC_D1_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd1_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd1_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_233_MC_D1_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_233_MC_D1_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_233_MC_D1_PT_0_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_disparity_rdy_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_dis_func_prs_state_ffd1_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_dis_func_prs_state_ffd1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_dis_func_prs_state_ffd1_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_prs_state_fft2_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_prs_state_fft2_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_prs_state_fft2_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_prs_state_fft1_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_prs_state_fft1_MC_D2_PT_0_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_prs_state_fft1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft2_MC_D1_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft3_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_1_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_enc_8b_10b_prs_state_fft1_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd1_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd1_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd1_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_s_func_prs_state_ffd2_MC_D1_PT_0_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_312_MC_D1_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_312_MC_D1_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_4_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_4_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_5_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_5_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_6_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_6_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_6_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_6_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_7_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_dis_func_n0040_MC_D2_PT_7_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_307_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_307_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_run_disparity_MC_D2_PT_0_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_run_disparity_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_run_disparity_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_run_disparity_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_run_disparity_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_run_disparity_MC_D2_PT_3_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_0_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_2_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_nds6_MC_D2_PT_3_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_246_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_246_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_246_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_246_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_4_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_4_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_4_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_5_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_5_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_5_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_6_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_6_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_upper_enc_pds6_MC_D2_PT_6_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_327_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_327_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_327_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_N_PZ_327_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_1_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_3_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_nds6_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_1_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_2_IN4 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_2_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_3_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_3_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_3_IN3 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_pds6_MC_D2_PT_3_IN6 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_1_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_1_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_1_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_1_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_2_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_2_IN2 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_2_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_2_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_3_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_3_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_4_IN5 : STD_LOGIC; 
  signal NlwInverterSignal_serial_data_0_MC_D2_PT_4_IN7 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_0_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_0_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_2_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_3_IN0 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_3_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_lower_enc_s_term_MC_D2_PT_4_IN2 : STD_LOGIC;