vz_ver4.gyd

来自「该工程文件实现ARM系统中CPLD的逻辑工作」· GYD 代码 · 共 38 行

Pin Freeze File:  version D.19

;If you have made significant changes to your 7300 design and have trouble
;recreating the same pinout try disabling the FREEZE_OPTIMIZATION option.
;Removing the semicolon on the FREEZE_OPTIMIZATION line below disables this
;option.  FREEZE_OPTIMIZATION=OFF tells the optimization software to
;take account of the pin-assignments (e.g., apply different collapsing
;rules to logic assigned to fast-function blocks).
;Do NOT use this option when targeting a 9500 device.
;FREEZE_OPTIMIZATION: OFF
9536XL44VQ XC9536XL-10-VQ44
CLK_RST PIN14
A22 PIN1
CLK PIN16
DISPLAY PIN38
A21 PIN44
A20 PIN43
RSTIN PIN23
EXTCE PIN2
DON PIN37
RST_VZ PIN27
HPICE PIN29
SYNC PIN18
NICCE PIN30


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_12 "L1/lfsr_counter1/Q_OUT3" "L1/lfsr_counter1/Q_OUT2" "L1/lfsr_counter1/Q_OUT1" "L1/lfsr_counter1/Q_OUT0"
		 "L1/TERM_CNT1" "\$Net00013_" "L1/lfsr_counter1/Q_OUT4"
PARTITION FB2_1 "L1/lfsr_counter2/Q_OUT6" "L1/lfsr_counter2/Q_OUT5" "L1/lfsr_counter2/Q_OUT4" "\$Net00007_"
		 "L1/lfsr_counter2/Q_OUT3" "L1/lfsr_counter2/Q_OUT2" "L1/lfsr_counter2/Q_OUT1" "L1/lfsr_counter2/Q_OUT0"
		 "\$Net00015_" "\$Net00012_" "L1/TERM_CNT2" "\$Net00010_$BUF0"
		 "L1/lfsr_counter2/Q_OUT7" EXP4_