myfifo.sim.qmsg

VERILOG HDL 实际工控项目源码

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version " "Info: Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Sep 19 12:05:13 2004 " "Info: Processing started: Sun Sep 19 12:05:13 2004" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --import_settings_files=on --export_settings_files=off myfifo -c myfifo " "Info: Command: quartus_sim --import_settings_files=on --export_settings_files=off myfifo -c myfifo" {  } {  } 0}
{ "Warning" "WSIM_MACHINE_BIT_NOT_FOUND" "ad_collect:inst1\|step~42 " "Warning: Can't display state machine states -- register holding state machine bit ad_collect:inst1\|step~42 was synthesized away" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|page\[0\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|page\[0\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[13\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[13\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[12\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[12\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[11\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[11\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[10\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[10\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[9\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[9\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[8\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[8\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[7\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[7\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[6\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[6\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[5\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[5\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[4\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[4\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[3\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[3\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[2\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[2\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[1\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[1\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|ad_db\[0\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|ad_db\[0\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|page\[3\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|page\[3\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_clk " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_clk" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|page\[1\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|page\[1\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|mcu_rd " "Warning: Can't find signal in vector source file for input pin \|myfifo\|mcu_rd" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|mcu_wr " "Warning: Can't find signal in vector source file for input pin \|myfifo\|mcu_wr" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|mcu_a\[15\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|mcu_a\[15\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|mcu_a\[13\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|mcu_a\[13\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|mcu_a\[14\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|mcu_a\[14\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|mcu_a\[12\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|mcu_a\[12\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|dram_busy " "Warning: Can't find signal in vector source file for input pin \|myfifo\|dram_busy" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_add\[14\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_add\[14\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_add\[15\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_add\[15\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_add\[12\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_add\[12\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_add\[13\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_add\[13\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|dog_en " "Warning: Can't find signal in vector source file for input pin \|myfifo\|dog_en" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[0\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[0\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[1\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[1\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[2\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[2\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[3\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[3\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[4\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[4\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[5\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[5\]" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|myfifo\|rd_addr\[6\] " "Warning: Can't find signal in vector source file for input pin \|myfifo\|rd_addr\[6\]" {  } {  } 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     14.25 % " "Info: Simulation coverage is      14.25 %" {  } {  } 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "87610 " "Info: Number of transitions in simulation is 87610" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 38 s " "Info: Quartus II Simulator was successful. 0 errors, 38 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Sep 19 12:05:26 2004 " "Info: Processing ended: Sun Sep 19 12:05:26 2004" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" {  } {  } 0}  } {  } 0}