myfifo.map.eqn

VERILOG HDL 实际工控项目源码

--C1_full_int is ad_collect:inst1|full_int
--operation mode is normal

C1_full_int_lut_out = !C1L94 & !C1L05 & (C1_full_int # C1L2);
C1_full_int = DFFEA(C1_full_int_lut_out, g_clk, !B1_rst, , , , );


--C1_ad_cs is ad_collect:inst1|ad_cs
--operation mode is normal

C1_ad_cs_lut_out = !C1L06Q & (C1_ad_cs # !C1L01 & C1L65);
C1_ad_cs = DFFEA(C1_ad_cs_lut_out, g_clk, !B1_rst, , , , );


--C1_ad_rd is ad_collect:inst1|ad_rd
--operation mode is normal

C1_ad_rd_lut_out = !C1L16Q & (C1_ad_rd # !C1L21);
C1_ad_rd = DFFEA(C1_ad_rd_lut_out, g_clk, !B1_rst, , , , );


--C1_ad_conv is ad_collect:inst1|ad_conv
--operation mode is normal

C1_ad_conv_lut_out = !C1L46Q & (C1_ad_conv # !C1L31 & C1L55);
C1_ad_conv = DFFEA(C1_ad_conv_lut_out, g_clk, !B1_rst, , , , );


--E1_dsp_sram_ce is addr_code:inst5|dsp_sram_ce
--operation mode is normal

E1_dsp_sram_ce = strb # page[3];


--E1_dsp_flash_oe is addr_code:inst5|dsp_flash_oe
--operation mode is normal

E1_dsp_flash_oe = strb # !rd_clk;


--E1_dsp_dram_rw is addr_code:inst5|dsp_dram_rw
--operation mode is normal

E1_dsp_dram_rw = strb # rd_clk;


--E1_dsp_flash_ce is addr_code:inst5|dsp_flash_ce
--operation mode is normal

E1_dsp_flash_ce = strb # page[1];


--E1_bus1_ce is addr_code:inst5|bus1_ce
--operation mode is normal

E1_bus1_ce = strb # page[2];


--E1L21 is addr_code:inst5|mcu_dram_ce~6
--operation mode is normal

E1L21 = mcu_a[15] & !mcu_a[13] & !mcu_a[14];


--E1_can_cs is addr_code:inst5|can_cs
--operation mode is normal

E1_can_cs = mcu_rd & mcu_wr # !mcu_a[12] # !E1L21;


--E1L31 is addr_code:inst5|mcu_dram_ce~7
--operation mode is normal

E1L31 = mcu_a[15] & !mcu_a[14];


--E1_addr_cs is addr_code:inst5|addr_cs
--operation mode is normal

E1_addr_cs = mcu_rd # mcu_a[12] # !mcu_a[13] # !E1L31;


--E1_dsp_run is addr_code:inst5|dsp_run
--operation mode is normal

E1_dsp_run_lut_out = !E1_dsp_run;
E1_dsp_run = DFFEA(E1_dsp_run_lut_out, E1_wr_led, , , , , );


--D1_dsp_rdy_en is mydram:inst2|dsp_rdy_en
--operation mode is normal

D1_dsp_rdy_en_lut_out = VCC;
D1_dsp_rdy_en = DFFEA(D1_dsp_rdy_en_lut_out, g_clk, !B1_rst, , D1L192, , );


--D1_dsp_rdy is mydram:inst2|dsp_rdy
--operation mode is normal

D1_dsp_rdy = D1_dsp_rdy_en & !dram_busy;


--B1_rst is watchdog:inst|rst
--operation mode is normal

B1_rst_lut_out = B1L74Q # B1L8 # B1_rst & B1L11;
B1_rst = DFFEA(B1_rst_lut_out, g_clk, , , , , );


--E1L5 is addr_code:inst5|dsp_dram_ce~24
--operation mode is normal

E1L5 = rd_add[15] & !rd_add[12] & !strb & !page[2];


--E1_dsp_dram_ce is addr_code:inst5|dsp_dram_ce
--operation mode is normal

E1_dsp_dram_ce = rd_add[14] # !E1L5 # !rd_add[13];


--E1_mcu_dram_ce is addr_code:inst5|mcu_dram_ce
--operation mode is normal

E1_mcu_dram_ce = mcu_a[12] # mcu_a[13] # mcu_a[14] # !mcu_a[15];


--B1_dog_clk is watchdog:inst|dog_clk
--operation mode is normal

B1_dog_clk_lut_out = !B1_dog_clk;
B1_dog_clk = DFFEA(B1_dog_clk_lut_out, B1_feed_dog, !B1_rst, , , , );


--L1_q[4] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is clrb_cntr

L1_q[4]_lut_out = (L1_q[4] $ L1L9) & C1L15;
L1_q[4] = DFFEA(L1_q[4]_lut_out, g_clk, !B1_rst, , , , );

--L1L11 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is clrb_cntr

L1L11 = CARRY(L1_q[4] & L1L9);


--L1_q[3] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

L1_q[3]_lut_out = (L1_q[3] $ L1L7) & C1L15;
L1_q[3] = DFFEA(L1_q[3]_lut_out, g_clk, !B1_rst, , , , );

--L1L9 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is clrb_cntr

L1L9 = CARRY(L1_q[3] & L1L7);


--L1_q[5] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is clrb_cntr

L1_q[5]_lut_out = (L1_q[5] $ L1L11) & C1L15;
L1_q[5] = DFFEA(L1_q[5]_lut_out, g_clk, !B1_rst, , , , );

--L1L31 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT
--operation mode is clrb_cntr

L1L31 = CARRY(L1_q[5] & L1L11);


--L1_q[6] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[6]
--operation mode is clrb_cntr

L1_q[6]_lut_out = (L1_q[6] $ L1L31) & C1L15;
L1_q[6] = DFFEA(L1_q[6]_lut_out, g_clk, !B1_rst, , , , );

--L1L51 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT
--operation mode is clrb_cntr

L1L51 = CARRY(L1_q[6] & L1L31);


--L1L82 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~104
--operation mode is normal

L1L82 = !L1_q[4] & !L1_q[3] & !L1_q[5] & !L1_q[6];


--L1_q[7] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[7]
--operation mode is clrb_cntr

L1_q[7]_lut_out = (L1_q[7] $ L1L51) & C1L15;
L1_q[7] = DFFEA(L1_q[7]_lut_out, g_clk, !B1_rst, , , , );

--L1L71 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT
--operation mode is clrb_cntr

L1L71 = CARRY(L1_q[7] & L1L51);


--L1_q[10] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[10]
--operation mode is clrb_cntr

L1_q[10]_lut_out = (L1_q[10] $ L1L12) & C1L15;
L1_q[10] = DFFEA(L1_q[10]_lut_out, g_clk, !B1_rst, , , , );


--L1_q[9] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[9]
--operation mode is clrb_cntr

L1_q[9]_lut_out = (L1_q[9] $ L1L91) & C1L15;
L1_q[9] = DFFEA(L1_q[9]_lut_out, g_clk, !B1_rst, , , , );

--L1L12 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT
--operation mode is clrb_cntr

L1L12 = CARRY(L1_q[9] & L1L91);


--L1_q[8] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[8]
--operation mode is clrb_cntr

L1_q[8]_lut_out = (L1_q[8] $ L1L71) & C1L15;
L1_q[8] = DFFEA(L1_q[8]_lut_out, g_clk, !B1_rst, , , , );

--L1L91 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT
--operation mode is clrb_cntr

L1L91 = CARRY(L1_q[8] & L1L71);


--C1L25 is ad_collect:inst1|int_reg~114
--operation mode is normal

C1L25 = L1_q[10] & L1_q[9] & L1_q[8];


--C1L94 is ad_collect:inst1|full_int~106
--operation mode is normal

C1L94 = L1L82 & (!C1_full_int # !L1_q[7]) # !C1L25;


--C1L05 is ad_collect:inst1|full_int~107
--operation mode is normal

C1L05 = !C1_full_int & (!L1_q[8] # !L1_q[9] # !L1_q[10]);


--L1_q[2] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

L1_q[2]_lut_out = (L1_q[2] $ L1L5) & C1L15;
L1_q[2] = DFFEA(L1_q[2]_lut_out, g_clk, !B1_rst, , , , );

--L1L7 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

L1L7 = CARRY(L1_q[2] & L1L5);


--L1_q[1] is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

L1_q[1]_lut_out = (L1_q[1] $ L1L3) & C1L15;
L1_q[1] = DFFEA(L1_q[1]_lut_out, g_clk, !B1_rst, , , , );

--L1L5 is ad_collect:inst1|lpm_counter:int_reg_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

L1L5 = CARRY(L1_q[1] & L1L3);


--C1L1 is ad_collect:inst1|LessThan~371
--operation mode is normal

C1L1 = !L1_q[4] & !L1_q[3] & (!L1_q[1] # !L1_q[2]);


--C1L2 is ad_collect:inst1|LessThan~372
--operation mode is normal

C1L2 = !L1_q[7] & !L1_q[6] & (C1L1 # !L1_q[5]);


--C1L06Q is ad_collect:inst1|step~62
--operation mode is normal

C1L06Q_lut_out = C1L16Q;
C1L06Q = DFFEA(C1L06Q_lut_out, g_clk, !B1_rst, , , , );


--C1L95Q is ad_collect:inst1|step~61
--operation mode is normal

C1L95Q_lut_out = C1L06Q;
C1L95Q = DFFEA(C1L95Q_lut_out, g_clk, !B1_rst, , , , );


--C1L36Q is ad_collect:inst1|step~65
--operation mode is normal

C1L36Q_lut_out = C1L41 # C1L46Q # C1L95Q & !C1L32;
C1L36Q = DFFEA(C1L36Q_lut_out, g_clk, !B1_rst, , , , );


--C1_eoc_reg[0] is ad_collect:inst1|eoc_reg[0]
--operation mode is normal

C1_eoc_reg[0]_lut_out = ad_eoc;
C1_eoc_reg[0] = DFFEA(C1_eoc_reg[0]_lut_out, g_clk, !B1_rst, , , , );


--C1_eoc_reg[1] is ad_collect:inst1|eoc_reg[1]
--operation mode is normal

C1_eoc_reg[1]_lut_out = C1_eoc_reg[0];
C1_eoc_reg[1] = DFFEA(C1_eoc_reg[1]_lut_out, g_clk, !B1_rst, , , , );


--C1L01 is ad_collect:inst1|Select~2329
--operation mode is normal

C1L01 = C1L95Q # C1L36Q & (C1_eoc_reg[0] # !C1_eoc_reg[1]);


--C1L85Q is ad_collect:inst1|step~60
--operation mode is normal

C1L85Q_lut_out = C1L75Q & C1_change_end & (C1L85Q # C1L51) # !C1L75Q & (C1L85Q # C1L51);
C1L85Q = DFFEA(C1L85Q_lut_out, g_clk, !B1_rst, , , , );


--C1L75Q is ad_collect:inst1|step~59
--operation mode is normal

C1L75Q_lut_out = C1L95Q & C1_counter[1] & C1_counter[0];
C1L75Q = DFFEA(C1L75Q_lut_out, g_clk, !B1_rst, , , , );


--C1L16Q is ad_collect:inst1|step~63
--operation mode is normal

C1L16Q_lut_out = C1L26Q;
C1L16Q = DFFEA(C1L16Q_lut_out, g_clk, !B1_rst, , , , );


--C1L26Q is ad_collect:inst1|step~64
--operation mode is normal

C1L26Q_lut_out = C1L36Q & C1_eoc_reg[1] & !C1_eoc_reg[0];
C1L26Q = DFFEA(C1L26Q_lut_out, g_clk, !B1_rst, , , , );


--C1L55 is ad_collect:inst1|reduce_or~54
--operation mode is normal

C1L55 = C1L85Q & !C1L75Q & !C1L16Q & !C1L26Q;


--C1L46Q is ad_collect:inst1|step~66
--operation mode is normal

C1L46Q_lut_out = C1L56Q;
C1L46Q = DFFEA(C1L46Q_lut_out, g_clk, !B1_rst, , , , );


--C1L56Q is ad_collect:inst1|step~67
--operation mode is normal

C1L56Q_lut_out = !C1L81;
C1L56Q = DFFEA(C1L56Q_lut_out, g_clk, !B1_rst, , , , );


--C1L65 is ad_collect:inst1|reduce_or~55
--operation mode is normal

C1L65 = C1L55 & !C1L46Q & !C1L56Q;


--C1L11 is ad_collect:inst1|Select~2331
--operation mode is normal

C1L11 = C1L46Q # C1L56Q # C1L06Q # C1L95Q;


--C1L21 is ad_collect:inst1|Select~2332
--operation mode is normal

C1L21 = C1L11 # C1L75Q # C1L36Q # !C1L85Q;


--C1L31 is ad_collect:inst1|Select~2334
--operation mode is normal

C1L31 = C1L36Q # C1L06Q # C1L95Q;


--E1_wr_led is addr_code:inst5|wr_led
--operation mode is normal

E1_wr_led = !rd_add[13] & E1L5 & rd_add[14];


--D1_rdy_reg[4] is mydram:inst2|rdy_reg[4]
--operation mode is normal

D1_rdy_reg[4]_lut_out = A1L77;
D1_rdy_reg[4] = DFFEA(D1_rdy_reg[4]_lut_out, D1_rdy_en, , , , , );


--D1_rdy_reg[3] is mydram:inst2|rdy_reg[3]
--operation mode is normal

D1_rdy_reg[3]_lut_out = A1L87;
D1_rdy_reg[3] = DFFEA(D1_rdy_reg[3]_lut_out, D1_rdy_en, , , , , );


--D1_rdy_reg[5] is mydram:inst2|rdy_reg[5]
--operation mode is normal

D1_rdy_reg[5]_lut_out = A1L67;
D1_rdy_reg[5] = DFFEA(D1_rdy_reg[5]_lut_out, D1_rdy_en, , , , , );


--D1_rdy_reg[2] is mydram:inst2|rdy_reg[2]
--operation mode is normal

D1_rdy_reg[2]_lut_out = A1L97;
D1_rdy_reg[2] = DFFEA(D1_rdy_reg[2]_lut_out, D1_rdy_en, , , , , );


--D1L092 is mydram:inst2|reduce_nor~94
--operation mode is normal

D1L092 = D1_rdy_reg[4] # D1_rdy_reg[3] # !D1_rdy_reg[2] # !D1_rdy_reg[5];


--D1_rdy_reg[1] is mydram:inst2|rdy_reg[1]
--operation mode is normal

D1_rdy_reg[1]_lut_out = A1L08;
D1_rdy_reg[1] = DFFEA(D1_rdy_reg[1]_lut_out, D1_rdy_en, , , , , );


--D1_rdy_reg[0] is mydram:inst2|rdy_reg[0]
--operation mode is normal

D1_rdy_reg[0]_lut_out = A1L18;
D1_rdy_reg[0] = DFFEA(D1_rdy_reg[0]_lut_out, D1_rdy_en, , , , , );


--D1L192 is mydram:inst2|reduce_nor~96
--operation mode is normal

D1L192 = !D1L092 & !D1_rdy_reg[1] & D1L392 & D1_rdy_reg[0];


--B1L74Q is watchdog:inst|step~20
--operation mode is normal

B1L74Q_lut_out = !B1L54Q;
B1L74Q = DFFEA(B1L74Q_lut_out, g_clk, , , , , );