ask_demodenaltblk.xml

matlab下

<ask_demoden>
   <block_dspbuilder>
      <db_block>
         <instancename>Input</instancename>
         <sourcename>AltBusAlteraBlockSet</sourcename>
         <instancenumber>1</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>nodetype</pname>
            <pvalue>InputPort</pvalue>
            <pname>bwl</pname>
            <pvalue>1</pvalue>
            <pname>bwr</pname>
            <pvalue>0</pvalue>
            <pname>sgn</pname>
            <pvalue>SingleBit</pvalue>
            <pname>sat</pname>
            <pvalue>off</pvalue>
            <pname>rnd</pname>
            <pvalue>off</pvalue>
            <pname>cst</pname>
            <pvalue>0</pvalue>
            <pname>LocPin</pname>
            <pvalue>any</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>PulseGenerator</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>2</outportfanout>
            <dstport>1</dstport>
            <dstblk>Delay2</dstblk>
            <dstport>1</dstport>
            <dstblk>IncrementDecrement</dstblk>
         </port_db>
         <nparameter>9</nparameter>
      </db_block>
      <db_block>
         <instancename>Output</instancename>
         <sourcename>AltBusAlteraBlockSet</sourcename>
         <instancenumber>2</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>nodetype</pname>
            <pvalue>OutputPort</pvalue>
            <pname>bwl</pname>
            <pvalue>8</pvalue>
            <pname>bwr</pname>
            <pvalue>0</pvalue>
            <pname>sgn</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>sat</pname>
            <pvalue>off</pvalue>
            <pname>rnd</pname>
            <pvalue>off</pvalue>
            <pname>cst</pname>
            <pvalue>0</pvalue>
            <pname>LocPin</pname>
            <pvalue>any</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>LUT</srcblk>
            <srcport>1</srcport>
         </port_db>
         <nparameter>9</nparameter>
      </db_block>
      <db_block>
         <instancename>Output1</instancename>
         <sourcename>AltBusAlteraBlockSet</sourcename>
         <instancenumber>3</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>nodetype</pname>
            <pvalue>OutputPort</pvalue>
            <pname>bwl</pname>
            <pvalue>1</pvalue>
            <pname>bwr</pname>
            <pvalue>0</pvalue>
            <pname>sgn</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>sat</pname>
            <pvalue>off</pvalue>
            <pname>rnd</pname>
            <pvalue>off</pvalue>
            <pname>cst</pname>
            <pvalue>0</pvalue>
            <pname>LocPin</pname>
            <pvalue>any</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>LogicalBitOperator</srcblk>
            <srcport>1</srcport>
         </port_db>
         <nparameter>9</nparameter>
      </db_block>
      <db_block>
         <instancename>Output2</instancename>
         <sourcename>AltBusAlteraBlockSet</sourcename>
         <instancenumber>4</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>nodetype</pname>
            <pvalue>OutputPort</pvalue>
            <pname>bwl</pname>
            <pvalue>1</pvalue>
            <pname>bwr</pname>
            <pvalue>0</pvalue>
            <pname>sgn</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>sat</pname>
            <pvalue>off</pvalue>
            <pname>rnd</pname>
            <pvalue>off</pvalue>
            <pname>cst</pname>
            <pvalue>0</pvalue>
            <pname>LocPin</pname>
            <pvalue>any</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>Delay2</srcblk>
            <srcport>1</srcport>
         </port_db>
         <nparameter>9</nparameter>
      </db_block>
      <db_block>
         <instancename>Delay1</instancename>
         <sourcename>DelayAlteraBlockSet</sourcename>
         <instancenumber>5</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>depth</pname>
            <pvalue>1</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>LUT</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>2</dstport>
            <dstblk>ParallelAdderSubtractor</dstblk>
         </port_db>
         <nparameter>4</nparameter>
      </db_block>
      <db_block>
         <instancename>Delay2</instancename>
         <sourcename>DelayAlteraBlockSet</sourcename>
         <instancenumber>6</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>depth</pname>
            <pvalue>2</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>Input</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>Output2</dstblk>
         </port_db>
         <nparameter>4</nparameter>
      </db_block>
      <db_block>
         <instancename>IncrementDecrement</instancename>
         <sourcename>IncDecAlteraBlockSet</sourcename>
         <instancenumber>7</instancenumber>
         <inport>2</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>BusType</pname>
            <pvalue>UnsignedInteger</pvalue>
            <pname>bwl</pname>
            <pvalue>8</pvalue>
            <pname>bwr</pname>
            <pvalue>4</pvalue>
            <pname>cst</pname>
            <pvalue>0</pvalue>
            <pname>direction</pname>
            <pvalue>Increment</pvalue>
            <pname>clken</pname>
            <pvalue>on</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>Input</srcblk>
            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>GND</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>LUT</dstblk>
         </port_db>
         <nparameter>8</nparameter>
      </db_block>
      <db_block>
         <instancename>ParallelAdderSubtractor</instancename>
         <sourcename>SumAlteraBlockSet</sourcename>
         <instancenumber>8</instancenumber>
         <inport>2</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>direction</pname>
            <pvalue>++</pvalue>
            <pname>pipeline</pname>
            <pvalue>on</pvalue>
            <pname>Inputs</pname>
            <pvalue>2</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>MaskValue</pname>
            <pvalue>1</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>LUT</srcblk>
            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>Delay1</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>Comparator</dstblk>
         </port_db>
         <nparameter>6</nparameter>
      </db_block>
      <db_block>
         <instancename>LUT</instancename>
         <sourcename>LUTAlteraBlockSet</sourcename>
         <instancenumber>9</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>BusType</pname>
            <pvalue>SignedInteger</pvalue>
            <pname>bwl</pname>
            <pvalue>8</pvalue>
            <pname>bwr</pname>
            <pvalue>0</pvalue>
            <pname>bwaddr</pname>
            <pvalue>8</pvalue>
            <pname>pipeline</pname>
            <pvalue>off</pvalue>
            <pname>clken</pname>
            <pvalue>off</pvalue>
            <pname>lpm</pname>
            <pvalue>off</pvalue>
            <pname>LocPin</pname>
            <pvalue>ask_demodenLUT</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>IncrementDecrement</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>3</outportfanout>
            <dstport>1</dstport>
            <dstblk>Output</dstblk>
            <dstport>1</dstport>
            <dstblk>ParallelAdderSubtractor</dstblk>
            <dstport>1</dstport>
            <dstblk>Delay1</dstblk>
         </port_db>
         <nparameter>9</nparameter>
      </db_block>
      <db_block>
         <instancename>Comparator</instancename>
         <sourcename>CompareAlteraBlockSet</sourcename>
         <instancenumber>10</instancenumber>
         <inport>2</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>direction</pname>
            <pvalue>a==b</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>ParallelAdderSubtractor</srcblk>
            <srcport>1</srcport>
            <inportpos>2</inportpos>
            <srcblk>GND1</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>LogicalBitOperator</dstblk>
         </port_db>
         <nparameter>2</nparameter>
      </db_block>
      <db_block>
         <instancename>LogicalBitOperator</instancename>
         <sourcename>LogiBitAlteraBlockSet</sourcename>
         <instancenumber>11</instancenumber>
         <inport>1</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
            <pname>Inputs</pname>
            <pvalue>4</pvalue>
            <pname>Operator</pname>
            <pvalue>NOT</pvalue>
         </parameters_db>
         <port_db>
            <inportpos>1</inportpos>
            <srcblk>Comparator</srcblk>
            <srcport>1</srcport>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>1</dstport>
            <dstblk>Output1</dstblk>
         </port_db>
         <nparameter>3</nparameter>
      </db_block>
      <db_block>
         <instancename>GND</instancename>
         <sourcename>SGNDAlteraBlockSet</sourcename>
         <instancenumber>12</instancenumber>
         <inport>0</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
         </parameters_db>
         <port_db>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>2</dstport>
            <dstblk>IncrementDecrement</dstblk>
         </port_db>
         <nparameter>1</nparameter>
      </db_block>
      <db_block>
         <instancename>GND1</instancename>
         <sourcename>SGNDAlteraBlockSet</sourcename>
         <instancenumber>13</instancenumber>
         <inport>0</inport>
         <outport>1</outport>
         <parameters_db>
            <pname>CompiledSampleTime</pname>
            <pvalue>0</pvalue>
         </parameters_db>
         <port_db>
            <outportpos>1</outportpos>
            <outportfanout>1</outportfanout>
            <dstport>2</dstport>
            <dstblk>Comparator</dstblk>
         </port_db>
         <nparameter>1</nparameter>
      </db_block>
   </block_dspbuilder>
   <top_parameters>
      <starttime>0.0</starttime>
      <stoptime>10000</stoptime>
      <nsubsystem>0</nsubsystem>
      <nblocks>13</nblocks>
   </top_parameters>
   <top_signalcompiler>
      <family>Stratix</family>
      <opt>Speed</opt>
      <synthtool>Others</synthtool>
      <vstim>on</vstim>
      <SynthAct>None</SynthAct>
      <workdir>c:\documents and settings\oldslam\桌面\dsp_homework\ask</workdir>
      <Procetype>prod</Procetype>
      <UseReset>on</UseReset>
      <ResetPin>Active High</ResetPin>
      <ClockPin>Output to Pin</ClockPin>
      <ClockPeriod>20</ClockPeriod>
      <UseSignalTap>off</UseSignalTap>
      <CreatePtfFile>off</CreatePtfFile>
      <SignalTapDepth>128</SignalTapDepth>
      <VerilogSupport>off</VerilogSupport>
      <bContainMegaCoreIpTb>0</bContainMegaCoreIpTb>
   </top_signalcompiler>
</ask_demoden>