hxrjtd.map.eqn

这是本人在Max plus2环境下用VHDL语言编的交通灯控制程序。做EDA课程设计的朋友可以下来参考参考。

--F1L1 is jtdkz:5|add_5~0
--operation mode is arithmetic

F1L1 = !F1_CNT_S[0];

--F1L2 is jtdkz:5|add_5~0COUT
--operation mode is arithmetic

F1L2 = CARRY(F1_CNT_S[0]);


--F1L3 is jtdkz:5|add_5~1
--operation mode is arithmetic

F1L3 = F1_CNT_S[1] $ F1L2;

--F1L4 is jtdkz:5|add_5~1COUT
--operation mode is arithmetic

F1L4 = CARRY(!F1L2 # !F1_CNT_S[1]);


--F1L5 is jtdkz:5|add_5~2
--operation mode is arithmetic

F1L5 = F1_CNT_S[2] $ !F1L4;

--F1L6 is jtdkz:5|add_5~2COUT
--operation mode is arithmetic

F1L6 = CARRY(F1_CNT_S[2] & !F1L4);


--F1L7 is jtdkz:5|add_5~3
--operation mode is arithmetic

F1L7 = F1_CNT_S[3] $ F1L6;

--F1L8 is jtdkz:5|add_5~3COUT
--operation mode is arithmetic

F1L8 = CARRY(!F1L6 # !F1_CNT_S[3]);


--F1L9 is jtdkz:5|add_5~4
--operation mode is normal

F1L9 = F1_CNT_S[4] $ !F1L8;


--J2_counter_cell[4] is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[4]
--operation mode is normal

J2_counter_cell[4]_lut_out = J2_counter_cell[4] $ !J2L9;
J2_counter_cell[4]_sload_eqn = (!F1L32Q & G1L64) # (F1L32Q & J2_counter_cell[4]_lut_out);
J2_counter_cell[4] = DFFE(J2_counter_cell[4]_sload_eqn, E1_CNTER, SB, , );


--J2_counter_cell[3] is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[3]
--operation mode is counter

J2_counter_cell[3]_lut_out = J2_counter_cell[3] $ J2L7;
J2_counter_cell[3]_sload_eqn = (!F1L32Q & J2_sset_path[3]) # (F1L32Q & J2_counter_cell[3]_lut_out);
J2_counter_cell[3] = DFFE(J2_counter_cell[3]_sload_eqn, E1_CNTER, SB, , );

--J2L9 is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[3]~COUT
--operation mode is counter

J2L9 = CARRY(J2_counter_cell[3] # !J2L7);


--J2_counter_cell[2] is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[2]
--operation mode is counter

J2_counter_cell[2]_lut_out = J2_counter_cell[2] $ !J2L5;
J2_counter_cell[2]_sload_eqn = (!F1L32Q & J2_sset_path[2]) # (F1L32Q & J2_counter_cell[2]_lut_out);
J2_counter_cell[2] = DFFE(J2_counter_cell[2]_sload_eqn, E1_CNTER, SB, , );

--J2L7 is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[2]~COUT
--operation mode is counter

J2L7 = CARRY(!J2_counter_cell[2] & !J2L5);


--J2_counter_cell[1] is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[1]
--operation mode is counter

J2_counter_cell[1]_lut_out = J2_counter_cell[1] $ J2L3;
J2_counter_cell[1]_sload_eqn = (!F1L32Q & J2_sset_path[1]) # (F1L32Q & J2_counter_cell[1]_lut_out);
J2_counter_cell[1] = DFFE(J2_counter_cell[1]_sload_eqn, E1_CNTER, SB, , );

--J2L5 is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[1]~COUT
--operation mode is counter

J2L5 = CARRY(J2_counter_cell[1] # !J2L3);


--J2_counter_cell[0] is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[0]
--operation mode is qfbk_counter

J2_counter_cell[0]_lut_out = !J2_counter_cell[0];
J2_counter_cell[0]_sload_eqn = (!F1L32Q & G1L05) # (F1L32Q & J2_counter_cell[0]_lut_out);
J2_counter_cell[0] = DFFE(J2_counter_cell[0]_sload_eqn, E1_CNTER, SB, , );

--J2L3 is cnt25:2|lpm_counter:CNTB_rtl_9|alt_synch_counter:wysi_counter|counter_cell[0]~COUT
--operation mode is qfbk_counter

J2L3 = CARRY(!J2_counter_cell[0]);


--J3_sload_path[2] is cnt5:3|lpm_counter:CNT3B_rtl_8|alt_synch_counter:wysi_counter|sload_path[2]
--operation mode is normal

J3_sload_path[2]_lut_out = J3_sload_path[2] $ !J3L5;
J3_sload_path[2]_sload_eqn = (D1L1 & J3_sset_path[2]) # (!D1L1 & J3_sload_path[2]_lut_out);
J3_sload_path[2] = DFFE(J3_sload_path[2]_sload_eqn, E1_CNTER, , , );


--J3_sload_path[1] is cnt5:3|lpm_counter:CNT3B_rtl_8|alt_synch_counter:wysi_counter|sload_path[1]
--operation mode is counter

J3_sload_path[1]_lut_out = J3_sload_path[1] $ J3L3;
J3_sload_path[1]_sload_eqn = (D1L1 & J3_sset_path[1]) # (!D1L1 & J3_sload_path[1]_lut_out);
J3_sload_path[1] = DFFE(J3_sload_path[1]_sload_eqn, E1_CNTER, , , );

--J3L5 is cnt5:3|lpm_counter:CNT3B_rtl_8|alt_synch_counter:wysi_counter|counter_cell[1]~COUT
--operation mode is counter

J3L5 = CARRY(!J3L3 # !J3_sload_path[1]);


--J3_sload_path[0] is cnt5:3|lpm_counter:CNT3B_rtl_8|alt_synch_counter:wysi_counter|sload_path[0]
--operation mode is qfbk_counter

J3_sload_path[0]_lut_out = !J3_sload_path[0];
J3_sload_path[0]_sload_eqn = (D1L1 & J3_sset_path[0]) # (!D1L1 & J3_sload_path[0]_lut_out);
J3_sload_path[0] = DFFE(J3_sload_path[0]_sload_eqn, E1_CNTER, , , );

--J3L3 is cnt5:3|lpm_counter:CNT3B_rtl_8|alt_synch_counter:wysi_counter|counter_cell[0]~COUT
--operation mode is qfbk_counter

J3L3 = CARRY(J3_sload_path[0]);


--J1_counter_cell[3] is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[3]
--operation mode is normal

J1_counter_cell[3]_lut_out = J1_counter_cell[3] $ J1L7;
J1_counter_cell[3]_sload_eqn = (!F1L01Q & G1L15) # (F1L01Q & J1_counter_cell[3]_lut_out);
J1_counter_cell[3] = DFFE(J1_counter_cell[3]_sload_eqn, E1_CNTER, !F1L91, , );


--J1_counter_cell[2] is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[2]
--operation mode is counter

J1_counter_cell[2]_lut_out = J1_counter_cell[2] $ !J1L5;
J1_counter_cell[2]_sload_eqn = (!F1L01Q & G1L74) # (F1L01Q & J1_counter_cell[2]_lut_out);
J1_counter_cell[2] = DFFE(J1_counter_cell[2]_sload_eqn, E1_CNTER, !F1L91, , );

--J1L7 is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[2]~COUT
--operation mode is counter

J1L7 = CARRY(!J1_counter_cell[2] & !J1L5);


--J1_counter_cell[1] is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[1]
--operation mode is counter

J1_counter_cell[1]_lut_out = J1_counter_cell[1] $ J1L3;
J1_counter_cell[1]_sload_eqn = (!F1L01Q & J1_sset_path[1]) # (F1L01Q & J1_counter_cell[1]_lut_out);
J1_counter_cell[1] = DFFE(J1_counter_cell[1]_sload_eqn, E1_CNTER, !F1L91, , );

--J1L5 is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[1]~COUT
--operation mode is counter

J1L5 = CARRY(J1_counter_cell[1] # !J1L3);


--J1_counter_cell[0] is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[0]
--operation mode is qfbk_counter

J1_counter_cell[0]_lut_out = !J1_counter_cell[0];
J1_counter_cell[0]_sload_eqn = (!F1L01Q & J1_sset_path[0]) # (F1L01Q & J1_counter_cell[0]_lut_out);
J1_counter_cell[0] = DFFE(J1_counter_cell[0]_sload_eqn, E1_CNTER, !F1L91, , );

--J1L3 is cnt15:1|lpm_counter:CNT5B_rtl_7|alt_synch_counter:wysi_counter|counter_cell[0]~COUT
--operation mode is qfbk_counter

J1L3 = CARRY(!J1_counter_cell[0]);


--F1L42Q is jtdkz:5|MR~reg0
--operation mode is normal

F1L42Q_lut_out = !F1L93Q & F1L83Q;
F1L42Q = DFFE(F1L42Q_lut_out, E1_CNTER, , , );


--F1L01Q is jtdkz:5|BG~reg0
--operation mode is normal

F1L01Q_lut_out = F1L04Q;
F1L01Q = DFFE(F1L01Q_lut_out, E1_CNTER, , , );


--F1L11Q is jtdkz:5|BY~reg0
--operation mode is normal

F1L11Q_lut_out = F1L14Q;
F1L11Q = DFFE(F1L11Q_lut_out, E1_CNTER, , , );


--F1L32Q is jtdkz:5|MG~reg0
--operation mode is normal

F1L32Q_lut_out = !F1L83Q;
F1L32Q = DFFE(F1L32Q_lut_out, E1_CNTER, , , );


--F1L52Q is jtdkz:5|MY~reg0
--operation mode is normal

F1L52Q_lut_out = F1L93Q;
F1L52Q = DFFE(F1L52Q_lut_out, E1_CNTER, , , );


--F1L93Q is jtdkz:5|STATE~5
--operation mode is normal

F1L93Q_lut_out = F1L63 # F1L43 & !F1L62 & !F1L72;
F1L93Q = DFFE(F1L93Q_lut_out, E1_CNTER, , , );


--F1L83Q is jtdkz:5|STATE~4
--operation mode is normal

F1L83Q_lut_out = !F1L23 & (F1_reduce_nor_58 # !F1L14Q);
F1L83Q = DFFE(F1L83Q_lut_out, E1_CNTER, , , );


--E1_CNTER is fpj:4|CNTER
--operation mode is normal

E1_CNTER_lut_out = !E1_CNTER;
E1_CNTER = DFFE(E1_CNTER_lut_out, CLK, !RST, , );


--F1L04Q is jtdkz:5|STATE~6
--operation mode is normal

F1L04Q_lut_out = F1L02 & (F1L04Q # F1L93Q & !F1_reduce_nor_58) # !F1L02 & F1L93Q & !F1_reduce_nor_58;
F1L04Q = DFFE(F1L04Q_lut_out, E1_CNTER, , , );


--F1L14Q is jtdkz:5|STATE~7
--operation mode is normal

F1L14Q_lut_out = F1_reduce_nor_58 & (F1L14Q # F1L04Q & !F1L02) # !F1_reduce_nor_58 & F1L04Q & !F1L02;
F1L14Q = DFFE(F1L14Q_lut_out, E1_CNTER, , , );


--G1L54 is xskz:6|i~1620
--operation mode is normal

G1L54 = !F1L52Q & !F1L32Q & !F1L11Q & !F1L01Q;


--G1L64 is xskz:6|i~1622
--operation mode is normal

G1L64 = F1L32Q & J2_counter_cell[4];


--C1L7 is cnt25:2|Mux_49_rtl_11~0
--operation mode is normal

C1L7 = !J2_counter_cell[3] & (!J2_counter_cell[0] & !J2_counter_cell[1] # !J2_counter_cell[2]);


--G1L1 is xskz:6|i~93
--operation mode is normal

G1L1 = G1L54 & (G1L1 # G1L64 & !C1L7) # !G1L54 & G1L64 & !C1L7;


--C1L9 is cnt25:2|Mux_50_rtl_15~0
--operation mode is normal

C1L9 = !J2_counter_cell[2] & (!J2_counter_cell[1] # !J2_counter_cell[0]) # !J2_counter_cell[3];


--C1L8 is cnt25:2|Mux_50_rtl_14~0
--operation mode is normal

C1L8 = J2_counter_cell[3] & (!J2_counter_cell[2] # !J2_counter_cell[1] # !J2_counter_cell[0]) # !J2_counter_cell[3] & J2_counter_cell[2] & (J2_counter_cell[0] # J2_counter_cell[1]);


--G1L45 is xskz:6|i~1679
--operation mode is normal

G1L45 = F1L32Q & (J2_counter_cell[4] & !C1L8 # !J2_counter_cell[4] & !C1L9);


--G1L84 is xskz:6|i~1627
--operation mode is normal

G1L84 = !F1L52Q & !F1L32Q;


--G1L72 is xskz:6|i~446
--operation mode is normal

G1L72 = G1L2 & !F1L11Q & !F1L01Q;


--G1L53 is xskz:6|i~546
--operation mode is normal

G1L53 = F1L01Q & J1_counter_cell[3] & (J1_counter_cell[1] # J1_counter_cell[2]);


--G1L2 is xskz:6|i~94
--operation mode is normal

G1L2 = G1L45 # G1L84 & (G1L72 # G1L53);


--C1L01 is cnt25:2|Mux_51_rtl_17~0
--operation mode is normal

C1L01 = J2_counter_cell[0] & (J2_counter_cell[1] & !J2_counter_cell[2] & !J2_counter_cell[3] # !J2_counter_cell[1] & J2_counter_cell[2] & J2_counter_cell[3]) # !J2_counter_cell[0] & J2_counter_cell[2] & (J2_counter_cell[1] $ !J2_counter_cell[3]);


--C1L11 is cnt25:2|Mux_51_rtl_18~0
--operation mode is normal

C1L11 = !J2_counter_cell[2] & J2_counter_cell[3] & (J2_counter_cell[0] $ J2_counter_cell[1]);


--G1L65 is xskz:6|i~1696
--operation mode is normal

G1L65 = F1L32Q & (J2_counter_cell[4] & C1L01 # !J2_counter_cell[4] & C1L11);


--G1L55 is xskz:6|i~1685
--operation mode is normal

G1L55 = F1L01Q & J1_counter_cell[3] & !J1_counter_cell[1] & !J1_counter_cell[2];


--G1L92 is xskz:6|i~460
--operation mode is normal

G1L92 = G1L3 & !F1L11Q & !F1L01Q;


--G1L3 is xskz:6|i~95
--operation mode is normal

G1L3 = G1L65 # G1L84 & (G1L55 # G1L92);


--C1L21 is cnt25:2|Mux_52_rtl_20~0
--operation mode is normal

C1L21 = J2_counter_cell[0] & !J2_counter_cell[2] & (J2_counter_cell[3] # !J2_counter_cell[1]) # !J2_counter_cell[0] & (J2_counter_cell[2] $ (J2_counter_cell[1] # !J2_counter_cell[3]));


--C1L31 is cnt25:2|Mux_52_rtl_21~0
--operation mode is normal

C1L31 = J2_counter_cell[0] & (!J2_counter_cell[2] # !J2_counter_cell[1]) # !J2_counter_cell[0] & (J2_counter_cell[1] # J2_counter_cell[2] # !J2_counter_cell[3]);


--G1L85 is xskz:6|i~1715
--operation mode is normal

G1L85 = F1L32Q & (J2_counter_cell[4] & C1L21 # !J2_counter_cell[4] & !C1L31);


--G1L93 is xskz:6|i~580
--operation mode is normal

G1L93 = G1L4 & !F1L11Q & !F1L01Q;


--G1L04 is xskz:6|i~581
--operation mode is normal

G1L04 = F1L01Q & J1_counter_cell[2] & (J1_counter_cell[1] # !J1_counter_cell[3]);


--G1L95 is xskz:6|i~1718
--operation mode is normal

G1L95 = G1L85 # G1L84 & (G1L93 # G1L04);


--G1L75 is xskz:6|i~1703
--operation mode is normal

G1L75 = !F1L32Q & (F1L52Q # F1L11Q & !F1L01Q);


--G1L4 is xskz:6|i~96
--operation mode is normal

G1L4 = G1L95 # G1L75 & !J3_sload_path[1] & !J3_sload_path[2];


--G1L63 is xskz:6|i~559
--operation mode is normal

G1L63 = J1_counter_cell[2] & (J1_counter_cell[1] $ J1_counter_cell[3]) # !J1_counter_cell[2] & J1_counter_cell[1] & !J1_counter_cell[3];


--G1L83 is xskz:6|i~565
--operation mode is normal

G1L83 = G1L63 & F1L01Q & !F1L52Q & !F1L32Q;


--C1L41 is cnt25:2|Mux_53_rtl_23~0
--operation mode is normal

C1L41 = J2_counter_cell[2] & (J2_counter_cell[0] & J2_counter_cell[1] & !J2_counter_cell[3] # !J2_counter_cell[0] & !J2_counter_cell[1] & J2_counter_cell[3]) # !J2_counter_cell[2] & (J2_counter_cell[0] $ J2_counter_cell[1] $ J2_counter_cell[3]);


--C1L51 is cnt25:2|Mux_53_rtl_24~0
--operation mode is normal

C1L51 = J2_counter_cell[3] & (J2_counter_cell[0] & !J2_counter_cell[1] & J2_counter_cell[2] # !J2_counter_cell[0] & (J2_counter_cell[1] $ !J2_counter_cell[2]));


--G1L06 is xskz:6|i~1731
--operation mode is normal

G1L06 = F1L32Q & (J2_counter_cell[4] & C1L41 # !J2_counter_cell[4] & C1L51);


--G1L16 is xskz:6|i~1734
--operation mode is normal

G1L16 = G1L06 # G1L75 & J3_sload_path[1] & !J3_sload_path[2];


--G1L5 is xskz:6|i~97
--operation mode is normal

G1L5 = G1L83 # G1L16 # G1L54 & G1L5;


--G1L94 is xskz:6|i~1629
--operation mode is normal

G1L94 = !F1L52Q & !F1L32Q & !F1L01Q;

--G1L17 is xskz:6|i~1882
--operation mode is normal

G1L17 = !F1L52Q & !F1L32Q & !F1L01Q;


--G1L13 is xskz:6|i~484
--operation mode is normal

G1L13 = !J3_sload_path[2] # !J3_sload_path[1];


--G1L24 is xskz:6|i~880
--operation mode is normal

G1L24 = F1L11Q & G1L13 & !J3_sload_path[0] # !F1L11Q & G1L6;


--G1L25 is xskz:6|i~1632
--operation mode is normal

G1L25 = !J3_sload_path[0] & (!J3_sload_path[2] # !J3_sload_path[1]);


--G1L34 is xskz:6|i~885
--operation mode is normal

G1L34 = F1L52Q & G1L25 # !F1L52Q & F1L01Q & J1_counter_cell[0];


--G1L36 is xskz:6|i~1780
--operation mode is normal

G1L36 = G1L94 & (G1L24 # G1L34 & !F1L32Q) # !G1L94 & G1L34 & !F1L32Q;


--G1L35 is xskz:6|i~1633
--operation mode is normal

G1L35 = !J2_counter_cell[3] & !J2_counter_cell[4];


--G1L44 is xskz:6|i~895
--operation mode is normal

G1L44 = G1L35 & J2_counter_cell[1] & J2_counter_cell[2] & J2_counter_cell[0] # !G1L35 & !J2_counter_cell[0];


--G1L6 is xskz:6|i~98
--operation mode is normal

G1L6 = G1L36 # G1L44 & F1L32Q;


--C1L1 is cnt25:2|Mux_43~0
--operation mode is normal

C1L1 = !J2_counter_cell[1] & !J2_counter_cell[2] # !J2_counter_cell[4] # !J2_counter_cell[3];


--G1L41 is xskz:6|i~159
--operation mode is normal

G1L41 = F1L32Q & !C1L1;


--G1L7 is xskz:6|i~99
--operation mode is normal

G1L7 = G1L96 # G1L41 # G1L54 & G1L7;


--B1L1 is cnt15:1|Mux_46~0
--operation mode is normal

B1L1 = J1_counter_cell[3] & (!J1_counter_cell[2] # !J1_counter_cell[1] # !J1_counter_cell[0]) # !J1_counter_cell[3] & J1_counter_cell[2] & (J1_counter_cell[0] # J1_counter_cell[1]);


--G1L12 is xskz:6|i~323
--operation mode is normal

G1L12 = B1L1 & F1L01Q & !F1L52Q & !F1L32Q;