📄 nn.rpt
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LC120-> - - - - - - - - - - * * - - - | - - - - - - * * | <-- |JTDKZ:5|S2
LC126-> - - - - - - - - - - * * - - - | - - - - - - * * | <-- |JTDKZ:5|S1
LC125-> - - - - - - - - - - * * * - - | - - - - - - * * | <-- |JTDKZ:5|S0
LC115-> - - - - - * * * * * - - - - - | - - * * * * * - | <-- MG
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: e:\hxrjtd\nn.rpt
nn
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'H':
Logic cells placed in LAB 'H'
+------------------------------- LC117 BG
| +----------------------------- LC118 BY
| | +--------------------------- LC127 |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|gcp2
| | | +------------------------- LC119 |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node1
| | | | +----------------------- LC116 |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node2
| | | | | +--------------------- LC114 |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node3
| | | | | | +------------------- LC121 |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node4
| | | | | | | +----------------- LC122 |JTDKZ:5|STATE1
| | | | | | | | +--------------- LC123 |JTDKZ:5|STATE0
| | | | | | | | | +------------- LC124 |JTDKZ:5|S4
| | | | | | | | | | +----------- LC113 |JTDKZ:5|S3
| | | | | | | | | | | +--------- LC120 |JTDKZ:5|S2
| | | | | | | | | | | | +------- LC126 |JTDKZ:5|S1
| | | | | | | | | | | | | +----- LC125 |JTDKZ:5|S0
| | | | | | | | | | | | | | +--- LC128 |JTDKZ:5|~748~1
| | | | | | | | | | | | | | | +- LC115 MG
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'H'
LC | | | | | | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'H':
LC119-> - - - - - - - * * - - - * - - - | - - - - - - * * | <-- |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node1
LC116-> - - - - - - - * * - - * - - - - | - - - - - - * * | <-- |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node2
LC114-> - - - - - - - * - - * - - - - - | - - - - - - - * | <-- |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node3
LC121-> - - - - - - - * * * - - - - * - | - - - - - - * * | <-- |JTDKZ:5|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node4
LC122-> * * - - - - - * * - - - - - * * | - - - - - - * * | <-- |JTDKZ:5|STATE1
LC123-> * * - - - - - * * - - - - - * * | - - - - - - * * | <-- |JTDKZ:5|STATE0
LC124-> - - - - - - * * * * - - - - * - | - - - - - - * * | <-- |JTDKZ:5|S4
LC113-> - - - - - * * * * - * - - - - - | - - - - - - * * | <-- |JTDKZ:5|S3
LC120-> - - * - * * * * * - - * - - * - | - - - - - - * * | <-- |JTDKZ:5|S2
LC126-> - - * * * * * * * - - - * - * - | - - - - - - * * | <-- |JTDKZ:5|S1
LC125-> - - * * * * * * * - - - - * * - | - - - - - - * * | <-- |JTDKZ:5|S0
LC128-> - - - - - - - - * - - - - - - - | - - - - - - - * | <-- |JTDKZ:5|~748~1
Pin
83 -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- CLK
11 -> - - - - - - - - * - - - - - * - | - - - - - - * * | <-- SB
12 -> - - - - - - - - * - - - - - * - | - - - - - - * * | <-- SM
LC33 -> * * - - - - - * * * * * * * - * | - - - * - - * * | <-- |FPJ:4|CNTER
LC106-> - - - - - - - * * * * * * * - - | - - - - - - * * | <-- |JTDKZ:5|CLR
LC112-> - - - - - - - * * * * * * * * - | - - - - - - * * | <-- |JTDKZ:5|EN
LC110-> - - - - - - - - * - - - - - - - | - - - - - - - * | <-- |JTDKZ:5|~748~2
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: e:\hxrjtd\nn.rpt
nn
** EQUATIONS **
CLK : INPUT;
RST : INPUT;
SB : INPUT;
SM : INPUT;
-- Node name is 'BG' = '|JTDKZ:5|:14'
-- Equation name is 'BG', type is output
BG = DFFE( _EQ001 $ _LC122, _LC033, VCC, VCC, VCC);
_EQ001 = _LC122 & _LC123;
-- Node name is 'BR' = '|JTDKZ:5|:10'
-- Equation name is 'BR', type is output
BR = DFFE(!_LC122 $ GND, _LC033, VCC, VCC, VCC);
-- Node name is 'BY' = '|JTDKZ:5|:12'
-- Equation name is 'BY', type is output
BY = DFFE( _EQ002 $ _LC123, _LC033, VCC, VCC, VCC);
_EQ002 = !_LC122 & _LC123;
-- Node name is 'B0'
-- Equation name is 'B0', location is LC049, type is output.
B0 = LCELL( _EQ003 $ GND);
_EQ003 = !_LC098 & !_LC100 & !_LC101 & _LC103 & _LC108 & MG & _X001
# _LC098 & !_LC103 & MG & _X001
# _LC098 & !_LC108 & MG & _X001
# _LC075 & !MG;
_X001 = EXP(!_LC098 & !_LC100 & !_LC101 & !_LC103 & !_LC108);
-- Node name is 'B1'
-- Equation name is 'B1', location is LC038, type is output.
B1 = LCELL( _EQ004 $ GND);
_EQ004 = _LC030 & MG
# _LC076 & !MG;
-- Node name is 'B2'
-- Equation name is 'B2', location is LC040, type is output.
B2 = LCELL( _EQ005 $ GND);
_EQ005 = _LC029 & MG
# _LC068 & !MG;
-- Node name is 'B3'
-- Equation name is 'B3', location is LC080, type is output.
B3 = LCELL( _EQ006 $ GND);
_EQ006 = BG & !_LC104 & _LC105 & _LC107 & !MG & !MY
# !BG & !BY & _LC070 & !MG & !MY
# _LC041 & MG;
-- Node name is 'B4'
-- Equation name is 'B4', location is LC091, type is output.
B4 = LCELL( _EQ007 $ GND);
_EQ007 = BG & !_LC104 & !_LC105 & !MG & !MY
# BG & !_LC104 & !_LC107 & !MG & !MY
# !BG & !BY & _LC082 & !MG & !MY
# _LC061 & MG;
-- Node name is 'B5'
-- Equation name is 'B5', location is LC051, type is output.
B5 = LCELL( _EQ008 $ GND);
_EQ008 = !BG & !BY & _LC062 & !MG & !MY
# _LC057 & MG;
-- Node name is 'B6'
-- Equation name is 'B6', location is LC065, type is output.
B6 = LCELL( _EQ009 $ GND);
_EQ009 = !BG & !BY & _LC074 & !MG & !MY;
-- Node name is 'B7'
-- Equation name is 'B7', location is LC072, type is output.
B7 = LCELL( _EQ010 $ GND);
_EQ010 = !BG & !BY & _LC077 & !MG & !MY;
-- Node name is 'MG' = '|JTDKZ:5|:8'
-- Equation name is 'MG', type is output
MG = DFFE( _EQ011 $ GND, _LC033, VCC, VCC, VCC);
_EQ011 = !_LC122 & !_LC123;
-- Node name is 'MR' = '|JTDKZ:5|:4'
-- Equation name is 'MR', type is output
MR = DFFE(!_LC122 $ VCC, _LC033, VCC, VCC, VCC);
-- Node name is 'MY' = '|JTDKZ:5|:6'
-- Equation name is 'MY', type is output
MY = DFFE( _EQ012 $ _LC123, _LC033, VCC, VCC, VCC);
_EQ012 = _LC122 & _LC123;
-- Node name is 'M0'
-- Equation name is 'M0', location is LC035, type is output.
M0 = LCELL( _EQ013 $ GND);
_EQ013 = _LC089 & MG
# _LC064 & !MG;
-- Node name is 'M1'
-- Equation name is 'M1', location is LC059, type is output.
M1 = LCELL( _EQ014 $ GND);
_EQ014 = _LC101 & _LC103 & !_LC108 & MG & _X001
# !_LC101 & !_LC103 & _LC108 & MG & _X001
# !_LC100 & _LC101 & !_LC108 & MG & _X001
# _LC055 & !MG;
_X001 = EXP(!_LC098 & !_LC100 & !_LC101 & !_LC103 & !_LC108);
-- Node name is 'M2'
-- Equation name is 'M2', location is LC045, type is output.
M2 = LCELL( _EQ015 $ GND);
_EQ015 = _LC088 & MG
# _LC073 & !MG;
-- Node name is 'M3'
-- Equation name is 'M3', location is LC053, type is output.
M3 = LCELL( _EQ016 $ GND);
_EQ016 = _LC100 & _LC101 & !_LC103 & !_LC108 & MG & _X001
# !_LC100 & !_LC101 & _LC103 & !_LC108 & MG & _X001
# _LC081 & !MG;
_X001 = EXP(!_LC098 & !_LC100 & !_LC101 & !_LC103 & !_LC108);
-- Node name is 'M4'
-- Equation name is 'M4', location is LC037, type is output.
M4 = LCELL( _EQ017 $ GND);
_EQ017 = _LC100 & _LC101 & !_LC103 & MG & _X001
# !_LC103 & _LC108 & MG & _X001
# _LC083 & !MG;
_X001 = EXP(!_LC098 & !_LC100 & !_LC101 & !_LC103 & !_LC108);
-- Node name is 'M5'
-- Equation name is 'M5', location is LC086, type is output.
M5 = LCELL( _EQ018 $ GND);
_EQ018 = BG & !_LC102 & !_LC104 & !_LC105 & !_LC107 & !MG & !MY
# !BG & !BY & _LC039 & !MG & !MY
# _LC084 & MG;
-- Node name is 'M6'
-- Equation name is 'M6', location is LC069, type is output.
M6 = LCELL( _EQ019 $ GND);
_EQ019 = !BG & !BY & _LC078 & !MG & !MY;
-- Node name is 'M7'
-- Equation name is 'M7', location is LC067, type is output.
M7 = LCELL( _EQ020 $ GND);
_EQ020 = !BG & !BY & _LC066 & !MG & !MY;
-- Node name is '|CNT5:3|:14' = '|CNT5:3|CNT3B0'
-- Equation name is '_LC056', type is buried
_LC056 = TFFE(!_EQ021, _LC033, VCC, VCC, VCC);
_EQ021 = !BY & _LC056 & !MY;
-- Node name is '|CNT5:3|:13' = '|CNT5:3|CNT3B1'
-- Equation name is '_LC058', type is buried
_LC058 = DFFE( _EQ022 $ _LC063, _LC033, VCC, VCC, VCC);
_EQ022 = !BY & !_LC063 & !MY;
-- Node name is '|CNT5:3|:12' = '|CNT5:3|CNT3B2'
-- Equation name is '_LC060', type is buried
_LC060 = DFFE( _EQ023 $ _LC079, _LC033, VCC, VCC, VCC);
_EQ023 = !BY & !_LC079 & !MY;
-- Node name is '|CNT5:3|LPM_ADD_SUB:38|addcore:adder|addcore:adder0|result_node1' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC063', type is buried
_LC063 = LCELL( _LC058 $ _LC056);
-- Node name is '|CNT5:3|LPM_ADD_SUB:38|addcore:adder|addcore:adder0|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC079', type is buried
_LC079 = LCELL( _LC060 $ _EQ024);
_EQ024 = _LC056 & _LC058;
-- Node name is '|CNT15:1|:24' = '|CNT15:1|CNT5B0'
-- Equation name is '_LC102', type is buried
_LC102 = DFFE( _EQ025 $ !BG, _LC033, VCC, !_EQ026, VCC);
_EQ025 = BG & !_LC102;
_EQ026 = _X002;
_X002 = EXP( SB & SM);
-- Node name is '|CNT15:1|:23' = '|CNT15:1|CNT5B1'
-- Equation name is '_LC107', type is buried
_LC107 = DFFE( _EQ027 $ GND, _LC033, VCC, !_EQ028, VCC);
_EQ027 = BG & _LC093
# !BG;
_EQ028 = _X002;
_X002 = EXP( SB & SM);
-- Node name is '|CNT15:1|:22' = '|CNT15:1|CNT5B2'
-- Equation name is '_LC105', type is buried
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