receive.npl

来自「结合XILINXCPLD所做的模拟RS232通信verilog源程序」· NPL 代码 · 共 13 行

JDF E
// Created by ISE ver 1.0
PROJECT receive
DESIGN receive Normal
DEVKIT XC95108 PC84
DEVFAM xc9500
FLOW XST Verilog
MODULE receive.v
MODSTYLE uart_rec Normal

[STRATEGY-LIST]
Normal=True, 1038274704