receive.vm6

结合XILINXCPLD所做的模拟RS232通信verilog源程序

NDS Database:  version E.33

NDS_INFO | xc9500 | 9510884 | XC95108-7-PC84

DEVICE | 95108 | 9510884 | 

NETWORK | receive | 0 | 0 | 478167047

INPUT_INSTANCE | 0 | 0 | NULL | N272 | receive_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | rxd | 3330 | PI | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N272 | 3285 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N272 | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N143 | receive_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | clock | 3331 | PI | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
NODE | FCLK-IO_0 | 3286 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N143 | 7 | 5 | II_FCLKINV

MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped+ClkInv | clock_pluse | receive_COPY_0_COPY_0 | 2222982400 | 5 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_3.FBK | 3490 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_3.Q | clock_div_3 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_4.FBK | 3491 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_4.Q | clock_div_4 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_5.FBK | 3492 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_5.Q | clock_div_5 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | FCLK-IO_0 | 3286 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N143 | 7 | 5 | II_FCLKINV
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_6.FBK | 3489 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_6.Q | clock_div_6 | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | clock_pluse | 3287 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_pluse.Q | clock_pluse | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | clock_pluse.FBK | 3510 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_pluse.Q | clock_pluse | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | clock_pluse.SI | clock_pluse | 0 | 4 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_3.FBK | 3490 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_3.Q | clock_div_3 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_4.FBK | 3491 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_4.Q | clock_div_4 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_5.FBK | 3492 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_5.Q | clock_div_5 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_div_6.FBK | 3489 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_div_6.Q | clock_div_6 | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | clock_pluse.D1 | 3333 | ? | 0 | 4096 | clock_pluse | NULL | NULL | clock_pluse.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | clock_pluse.D2 | 3334 | ? | 0 | 4096 | clock_pluse | NULL | NULL | clock_pluse.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_FALSE | clock_div_6.FBK
SPPTERM | 3 | IV_FALSE | clock_div_3.FBK | IV_FALSE | clock_div_4.FBK | IV_FALSE | clock_div_5.FBK

SRFF_INSTANCE | clock_pluse.REG | clock_pluse | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | clock_pluse.D | 3332 | ? | 0 | 0 | clock_pluse | NULL | NULL | clock_pluse.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
NODE | FCLK-IO_0 | 3286 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N143 | 7 | 5 | II_FCLKINV
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | clock_pluse.Q | 3335 | ? | 0 | 0 | clock_pluse | NULL | NULL | clock_pluse.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped+ClkInv | rxd_start_reg | receive_COPY_0_COPY_0 | 2222982400 | 15 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N272 | 3285 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N272 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_1.FBK | 3494 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_1.Q | bit_cnt_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_2.FBK | 3495 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_2.Q | bit_cnt_2 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_3.FBK | 3496 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_3.Q | bit_cnt_3 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_0.FBK | 3497 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_0.Q | count_reg_0 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_collect_1.FBK | 3498 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_collect_1.Q | bit_collect_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_1.FBK | 3499 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_1.Q | count_reg_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_collect_0.FBK | 3500 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_collect_0.Q | bit_collect_0 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_2 | 3298 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_2.Q | count_reg_2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_3 | 3303 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_3.Q | count_reg_3 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rxd_start_reg.FBK | 3501 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | rxd_start_reg.Q | rxd_start_reg | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_pluse | 3287 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_pluse.Q | clock_pluse | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_0.EXP | 3486 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_0.EXP | count_reg_0 | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_collect_1.EXP | 3487 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_collect_1.EXP | bit_collect_1 | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_0.FBK | 3493 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_0.Q | bit_cnt_0 | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | rxd_start_reg | 3288 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | rxd_start_reg.Q | rxd_start_reg | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | rxd_start_reg.FBK | 3501 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | rxd_start_reg.Q | rxd_start_reg | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | rxd_start_reg.SI | rxd_start_reg | 0 | 15 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N272 | 3285 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N272 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_1.FBK | 3494 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_1.Q | bit_cnt_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_2.FBK | 3495 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_2.Q | bit_cnt_2 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_3.FBK | 3496 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_3.Q | bit_cnt_3 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_0.FBK | 3497 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_0.Q | count_reg_0 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_collect_1.FBK | 3498 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_collect_1.Q | bit_collect_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_1.FBK | 3499 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_1.Q | count_reg_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_collect_0.FBK | 3500 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_collect_0.Q | bit_collect_0 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_2 | 3298 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_2.Q | count_reg_2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_3 | 3303 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_3.Q | count_reg_3 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rxd_start_reg.FBK | 3501 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | rxd_start_reg.Q | rxd_start_reg | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_pluse | 3287 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_pluse.Q | clock_pluse | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_0.EXP | 3486 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_0.EXP | count_reg_0 | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_collect_1.EXP | 3487 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_collect_1.EXP | bit_collect_1 | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_0.FBK | 3493 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_0.Q | bit_cnt_0 | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | rxd_start_reg.D1 | 3337 | ? | 0 | 4096 | rxd_start_reg | NULL | NULL | rxd_start_reg.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | rxd_start_reg.D2 | 3338 | ? | 0 | 4096 | rxd_start_reg | NULL | NULL | rxd_start_reg.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | count_reg_0.EXP
SPPTERM | 1 | IV_TRUE | bit_collect_1.EXP
SPPTERM | 4 | IV_FALSE | bit_cnt_0.FBK | IV_TRUE | bit_cnt_2.FBK | IV_TRUE | bit_cnt_3.FBK | IV_TRUE | rxd_start_reg.FBK
SPPTERM | 8 | IV_TRUE | count_reg_2 | IV_FALSE | count_reg_3 | IV_TRUE | bit_cnt_0.FBK | IV_FALSE | bit_cnt_2.FBK | IV_TRUE | bit_cnt_3.FBK | IV_TRUE | count_reg_0.FBK | IV_TRUE | count_reg_1.FBK | IV_TRUE | rxd_start_reg.FBK
SPPTERM | 10 | IV_TRUE | N272 | IV_TRUE | count_reg_2 | IV_FALSE | count_reg_3 | IV_FALSE | bit_cnt_0.FBK | IV_FALSE | bit_cnt_1.FBK | IV_FALSE | bit_cnt_2.FBK | IV_FALSE | bit_cnt_3.FBK | IV_TRUE | count_reg_0.FBK | IV_TRUE | bit_collect_1.FBK | IV_TRUE | count_reg_1.FBK
SPPTERM | 10 | IV_TRUE | N272 | IV_TRUE | count_reg_2 | IV_FALSE | count_reg_3 | IV_FALSE | bit_cnt_0.FBK | IV_FALSE | bit_cnt_1.FBK | IV_FALSE | bit_cnt_2.FBK | IV_FALSE | bit_cnt_3.FBK | IV_TRUE | count_reg_0.FBK | IV_TRUE | count_reg_1.FBK | IV_TRUE | bit_collect_0.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | rxd_start_reg.CLKF | 3339 | ? | 0 | 4096 | rxd_start_reg | NULL | NULL | rxd_start_reg.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clock_pluse

SRFF_INSTANCE | rxd_start_reg.REG | rxd_start_reg | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | rxd_start_reg.D | 3336 | ? | 0 | 0 | rxd_start_reg | NULL | NULL | rxd_start_reg.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | rxd_start_reg.CLKF | 3339 | ? | 0 | 4096 | rxd_start_reg | NULL | NULL | rxd_start_reg.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | clock_pluse
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | rxd_start_reg.Q | 3340 | ? | 0 | 0 | rxd_start_reg | NULL | NULL | rxd_start_reg.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+ClkInv | bit_cnt_0 | receive_COPY_0_COPY_0 | 2222986240 | 8 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N272 | 3285 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | NULL | N272 | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | bit_cnt_0.FBK | 3493 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_0.Q | bit_cnt_0 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_0.FBK | 3497 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_0.Q | count_reg_0 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_1.FBK | 3499 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_1.Q | count_reg_1 | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_2 | 3298 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_2.Q | count_reg_2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | count_reg_3 | 3303 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | count_reg_3.Q | count_reg_3 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clock_pluse | 3287 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | clock_pluse.Q | clock_pluse | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | rxd_start_reg.FBK | 3501 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | rxd_start_reg.Q | rxd_start_reg | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | bit_cnt_0 | 3289 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_0.Q | bit_cnt_0 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
NODE | bit_cnt_0.EXP | 3484 | ? | 0 | 0 | receive_COPY_0_COPY_0 | NULL | bit_cnt_0.EXP | bit_cnt_0 | 4 | 0 | MC_EXPORT
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK