📄 phyuz.rpt
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pha2 = acc2;
-- Node name is 'pha3'
-- Equation name is 'pha3', type is output
pha3 = acc3;
-- Node name is 'pha4'
-- Equation name is 'pha4', type is output
pha4 = acc4;
-- Node name is 'pha5'
-- Equation name is 'pha5', type is output
pha5 = acc5;
-- Node name is 'pha6'
-- Equation name is 'pha6', type is output
pha6 = acc6;
-- Node name is 'pha7'
-- Equation name is 'pha7', type is output
pha7 = acc7;
-- Node name is '|LPM_ADD_SUB:143|addcore:adder|:125' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_A7', type is buried
_LC1_A7 = LCELL( _EQ009);
_EQ009 = acc0 & acc1 & acc2;
-- Node name is '|LPM_ADD_SUB:143|addcore:adder|:129' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_A4', type is buried
_LC4_A4 = LCELL( _EQ010);
_EQ010 = acc3 & _LC1_A7;
-- Node name is '|LPM_ADD_SUB:143|addcore:adder|:133' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_A8', type is buried
_LC5_A8 = LCELL( _EQ011);
_EQ011 = acc3 & acc4 & _LC1_A7;
-- Node name is '|LPM_ADD_SUB:143|addcore:adder|:137' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_A1', type is buried
_LC2_A1 = LCELL( _EQ012);
_EQ012 = acc5 & _LC5_A8;
-- Node name is '|LPM_ADD_SUB:143|addcore:adder|:155' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC4_A1', type is buried
_LC4_A1 = LCELL( _EQ013);
_EQ013 = !acc5 & acc7
# acc7 & !_LC5_A8
# !acc6 & acc7
# acc5 & acc6 & !acc7 & _LC5_A8;
-- Node name is '|LPM_ADD_SUB:184|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_A4', type is buried
_LC5_A4 = LCELL( _EQ014);
_EQ014 = acc1 & acc2
# acc3;
-- Node name is '|LPM_ADD_SUB:184|addcore:adder|:125' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_A2', type is buried
_LC4_A2 = LCELL( _EQ015);
_EQ015 = acc1 & acc2;
-- Node name is '|LPM_ADD_SUB:184|addcore:adder|:133' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_A9', type is buried
_LC2_A9 = LCELL( _EQ016);
_EQ016 = acc1 & acc2 & acc4
# acc3 & acc4;
-- Node name is '|LPM_ADD_SUB:184|addcore:adder|:137' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_A1', type is buried
_LC5_A1 = LCELL( _EQ017);
_EQ017 = acc5 & _LC2_A9;
-- Node name is '|LPM_ADD_SUB:184|addcore:adder|:155' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC7_A1', type is buried
_LC7_A1 = LCELL( _EQ018);
_EQ018 = !acc5 & acc7
# acc7 & !_LC2_A9
# !acc6 & acc7
# acc5 & acc6 & !acc7 & _LC2_A9;
-- Node name is ':64'
-- Equation name is '_LC1_A4', type is buried
_LC1_A4 = LCELL( _EQ019);
_EQ019 = !acc7
# !acc5 & !acc6
# !acc6 & _LC3_A4;
-- Node name is '~74~1'
-- Equation name is '~74~1', location is LC3_A4, type is buried.
-- synthesized logic cell
_LC3_A4 = LCELL( _EQ020);
_EQ020 = !acc4
# !acc2 & !acc3;
-- Node name is ':222'
-- Equation name is '_LC1_A1', type is buried
_LC1_A1 = LCELL( _EQ021);
_EQ021 = acc6 & !_LC5_A1 & !phaa
# !acc6 & _LC5_A1 & !phaa
# acc6 & !_LC2_A1 & phaa
# !acc6 & _LC2_A1 & phaa;
-- Node name is ':231'
-- Equation name is '_LC2_A2', type is buried
_LC2_A2 = LCELL( _EQ022);
_EQ022 = acc5 & !_LC5_A8 & phaa
# !acc5 & _LC5_A8 & phaa
# acc5 & !_LC2_A9 & !phaa
# !acc5 & _LC2_A9 & !phaa;
-- Node name is ':240'
-- Equation name is '_LC2_A4', type is buried
_LC2_A4 = LCELL( _EQ023);
_EQ023 = acc4 & !_LC4_A4 & phaa
# !acc4 & _LC4_A4 & phaa
# acc4 & !_LC5_A4 & !phaa
# !acc4 & _LC5_A4 & !phaa;
-- Node name is ':249'
-- Equation name is '_LC3_A2', type is buried
_LC3_A2 = LCELL( _EQ024);
_EQ024 = acc3 & _LC4_A2 & !phaa
# !acc3 & !_LC4_A2 & !phaa
# acc3 & !_LC1_A7 & phaa
# !acc3 & _LC1_A7 & phaa;
-- Node name is ':258'
-- Equation name is '_LC2_A3', type is buried
_LC2_A3 = LCELL( _EQ025);
_EQ025 = !acc0 & acc2 & phaa
# acc0 & acc1 & !acc2
# !acc1 & acc2
# acc1 & !acc2 & !phaa;
-- Node name is ':360'
-- Equation name is '_LC1_A6', type is buried
_LC1_A6 = LCELL( _EQ026);
_EQ026 = phaa
# phab;
Project Information f:\lisha\phyuz.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'ACEX1K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = off
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:01
Partitioner 00:00:00
Fitter 00:00:01
Timing SNF Extractor 00:00:00
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:02
Memory Allocated
-----------------
Peak memory allocated during compilation = 25,565K
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