📄 top.rpt
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Project Information f:\lishanew\top.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 05/30/2005 22:22:00
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Memory Memory LCs
POF Device Pins Pins Pins Bits % Utilized LCs % Utilized
top EP1K30TC144-3 12 16 0 12288 50 % 129 7 %
User Pins: 12 16 0
Project Information f:\lishanew\top.rpt
** PROJECT COMPILATION MESSAGES **
Warning: Memory depth (512) differs from MIF depth (360) -- ignoring MIF value
Warning: Memory depth (1024) differs from MIF depth (720) -- ignoring MIF value
Project Information f:\lishanew\top.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
top@117 adata0
top@119 adata1
top@121 adata2
top@130 adata3
top@131 adata4
top@133 adata5
top@135 adata6
top@137 adata7
top@100 bdata0
top@98 bdata1
top@96 bdata2
top@92 bdata3
top@90 bdata4
top@88 bdata5
top@86 bdata6
top@82 bdata7
top@126 clk
top@17 ddin0
top@19 ddin1
top@21 ddin2
top@23 ddin3
top@26 ddin4
top@28 ddin5
top@30 ddin6
top@32 ddin7
top@118 keyclr
top@10 keyfre
top@8 keyphin
Project Information f:\lishanew\top.rpt
** EMBEDDED ARRAYS **
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|content: MEMORY (
width = 8;
depth = 512;
segmentsize = 512;
mode = MEM_READONLY#MEM_INITIALIZED#MEM_REG_WADDR_CLK0#MEM_REG_WCTRL_CLK0;
file = "F:/My Designs/sin360.mif";
)
OF SEGMENTS (
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_7,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_6,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_5,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_4,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_3,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_2,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_1,
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|segment0_0
);
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|content: MEMORY (
width = 8;
depth = 1024;
segmentsize = 1024;
mode = MEM_READONLY#MEM_INITIALIZED#MEM_REG_WADDR_CLK0#MEM_REG_WCTRL_CLK0;
file = "F:/My Designs/sin720.mif";
)
OF SEGMENTS (
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_7,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_6,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_5,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_4,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_3,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_2,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_1,
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|segment0_0
);
Project Information f:\lishanew\top.rpt
** FILE HIERARCHY **
|hz100:6|
|hz100:6|lpm_add_sub:40|
|hz100:6|lpm_add_sub:40|addcore:adder|
|hz100:6|lpm_add_sub:40|altshift:result_ext_latency_ffs|
|hz100:6|lpm_add_sub:40|altshift:carry_ext_latency_ffs|
|hz100:6|lpm_add_sub:40|altshift:oflow_ext_latency_ffs|
|arom:7|
|arom:7|lpm_rom:lpm_rom_component|
|arom:7|lpm_rom:lpm_rom_component|altrom:srom|
|achanle:8|
|achanle:8|lpm_add_sub:127|
|achanle:8|lpm_add_sub:127|addcore:adder|
|achanle:8|lpm_add_sub:127|altshift:result_ext_latency_ffs|
|achanle:8|lpm_add_sub:127|altshift:carry_ext_latency_ffs|
|achanle:8|lpm_add_sub:127|altshift:oflow_ext_latency_ffs|
|bfenpin:15|
|bfenpin:15|lpm_add_sub:63|
|bfenpin:15|lpm_add_sub:63|addcore:adder|
|bfenpin:15|lpm_add_sub:63|altshift:result_ext_latency_ffs|
|bfenpin:15|lpm_add_sub:63|altshift:carry_ext_latency_ffs|
|bfenpin:15|lpm_add_sub:63|altshift:oflow_ext_latency_ffs|
|phader:17|
|phader:17|lpm_add_sub:123|
|phader:17|lpm_add_sub:123|addcore:adder|
|phader:17|lpm_add_sub:123|altshift:result_ext_latency_ffs|
|phader:17|lpm_add_sub:123|altshift:carry_ext_latency_ffs|
|phader:17|lpm_add_sub:123|altshift:oflow_ext_latency_ffs|
|bchanle:24|
|bchanle:24|lpm_add_sub:160|
|bchanle:24|lpm_add_sub:160|addcore:adder|
|bchanle:24|lpm_add_sub:160|altshift:result_ext_latency_ffs|
|bchanle:24|lpm_add_sub:160|altshift:carry_ext_latency_ffs|
|bchanle:24|lpm_add_sub:160|altshift:oflow_ext_latency_ffs|
|sysclock:29|
|sysclock:29|lpm_add_sub:16|
|sysclock:29|lpm_add_sub:16|addcore:adder|
|sysclock:29|lpm_add_sub:16|altshift:result_ext_latency_ffs|
|sysclock:29|lpm_add_sub:16|altshift:carry_ext_latency_ffs|
|sysclock:29|lpm_add_sub:16|altshift:oflow_ext_latency_ffs|
|brom:31|
|brom:31|lpm_rom:lpm_rom_component|
|brom:31|lpm_rom:lpm_rom_component|altrom:srom|
|mcu:33|
Device-Specific Information: f:\lishanew\top.rpt
top
***** Logic for device 'top' compiled without errors.
Device: EP1K30TC144-3
ACEX 1K Configuration Scheme: Passive Serial
Device Options:
User-Supplied Start-Up Clock = OFF
Auto-Restart Configuration on Frame Error = OFF
Release Clears Before Tri-States = OFF
Enable Chip_Wide Reset = OFF
Enable Chip-Wide Output Enable = OFF
Enable INIT_DONE Output = OFF
JTAG User Code = 7f
MultiVolt I/O = OFF
R R R R R R R R R R R R R R R R R R
E E E E E E E E E E E E E E E E E E
S S S S S S a S a a S a a S V S a S a k a S S S S S S S
E E E E E E d E d V d E d d E C E d E d e d E V E E E E E E
R R R R R R a R a C a R a a R C R a R a y a R C R R R R R R
V V V V V G V t V t C t V t t G V I c G G G V t V t c t V C V V V V V V
E E E E E N E a E a I a E a a N E N l N N N E a E a l a E I E E E E E E
D D D D D D D 7 D 6 O 5 D 4 3 D D T k D D D D 2 D 1 r 0 D O D D D D D D
--------------------------------------------------------------------------_
/ 144 142 140 138 136 134 132 130 128 126 124 122 120 118 116 114 112 110 |_
/ 143 141 139 137 135 133 131 129 127 125 123 121 119 117 115 113 111 109 |
#TCK | 1 108 | ^DATA0
^CONF_DONE | 2 107 | ^DCLK
^nCEO | 3 106 | ^nCE
#TDO | 4 105 | #TDI
VCCIO | 5 104 | GND
GND | 6 103 | VCCINT
RESERVED | 7 102 | RESERVED
keyphin | 8 101 | RESERVED
RESERVED | 9 100 | bdata0
keyfre | 10 99 | RESERVED
RESERVED | 11 98 | bdata1
RESERVED | 12 97 | RESERVED
RESERVED | 13 96 | bdata2
RESERVED | 14 95 | RESERVED
GND | 15 94 | VCCIO
VCCINT | 16 93 | GND
ddin0 | 17 92 | bdata3
RESERVED | 18 91 | RESERVED
ddin1 | 19 EP1K30TC144-3 90 | bdata4
RESERVED | 20 89 | RESERVED
ddin2 | 21 88 | bdata5
RESERVED | 22 87 | RESERVED
ddin3 | 23 86 | bdata6
VCCIO | 24 85 | VCCINT
GND | 25 84 | GND
ddin4 | 26 83 | RESERVED
RESERVED | 27 82 | bdata7
ddin5 | 28 81 | RESERVED
RESERVED | 29 80 | RESERVED
ddin6 | 30 79 | RESERVED
RESERVED | 31 78 | RESERVED
ddin7 | 32 77 | ^MSEL0
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