mcu.vhd

来自「这是一个用MAX+PLUSII开发FPGA（1K30器件）开发的李沙育图形发生器」· VHDL 代码 · 共 28 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity mcu is
port(clkf,clkp:in std_logic;
     dd:in std_logic_vector(7 downto 0);
     clr_in2:out std_logic;
     qqp:out std_logic_vector(7 downto 0);
     qqf:out std_logic_vector(3 downto 0));
     end mcu;
architecture behav of mcu is
begin
clr_in2<=clkf or clkp;
process(clkp)
begin
if(clkp'event and clkp='1')then
   qqp<=dd;
     end if;
       end process;
process(clkf)
begin
if(clkf'event and clkf='1')then 
   qqf<=dd(3 downto 0);
     end if;
       end process;
end behav;