clock.rpt

ＦＰＧＡ数字钟的设计

LC85 -> - - - - - - - - - - - - - - - * | - * - - - - | <-- |CLK7:12|~470~1
LC63 -> - - - - - - - - - - - - - - - * | - * - - - - | <-- |CLK7:12|~470~2
LC56 -> - - - - - - - - - - - - - - * * | - * - - - - | <-- |CLK7:12|~569~1
LC91 -> - - - - - - - - - - - - - - * - | - * - - - - | <-- |CLK7:12|~569~2
LC79 -> - - - - - - - - - - - - - - * - | - * - - - - | <-- |CLK7:12|~569~3
LC66 -> - - - - - - - - - - - - * - - - | - * - - - - | <-- |M6_1SCAN:2|LPM_ADD_SUB:81|addcore:adder|addcore:adder0|result_node1
LC8  -> - - - - - - - - - - - - - * - - | - * - - - - | <-- |M6_1SCAN:2|LPM_ADD_SUB:81|addcore:adder|addcore:adder0|result_node2
LC35 -> - - - - - - - - - - - - - - * * | * * * * * * | <-- |NEWHOUR:11|hourt23
LC34 -> - - - - - - - - - - - - - - * * | * * * * * * | <-- |NEWHOUR:11|hourt22
LC33 -> - - - - - - - - - - - - - - * * | * * * * * * | <-- |NEWHOUR:11|hourt21
LC36 -> - - - - - - - - - - - - - - * * | * * * * * * | <-- |NEWHOUR:11|hourt20
LC94 -> - - * - - - - - - - - - - - - - | - * - - - - | <-- |NEWMINUTE:4|LPM_ADD_SUB:188|addcore:adder|addcore:adder0|result_node3
LC80 -> - * * * * * * * * * - - - - - - | - * - - - - | <-- |NEWSECOND:5|:11


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   e:\wy\clock.rpt
clock

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

                               Logic cells placed in LAB 'C'
        +--------------------- LC45 |CLK7:12|~325~1
        | +------------------- LC41 |CLK7:12|~332~1
        | | +----------------- LC43 |NEWHOUR:11|LPM_ADD_SUB:227|addcore:adder|addcore:adder0|result_node3
        | | | +--------------- LC37 |NEWHOUR:11|hourt12
        | | | | +------------- LC44 |NEWHOUR:11|hourt11
        | | | | | +----------- LC42 |NEWHOUR:11|hourt10
        | | | | | | +--------- LC35 |NEWHOUR:11|hourt23
        | | | | | | | +------- LC34 |NEWHOUR:11|hourt22
        | | | | | | | | +----- LC33 |NEWHOUR:11|hourt21
        | | | | | | | | | +--- LC36 |NEWHOUR:11|hourt20
        | | | | | | | | | | +- LC38 |NEWSECOND:5|sect12
        | | | | | | | | | | | 
        | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | |   that feed LAB 'C'
LC      | | | | | | | | | | | | A B C D E F |     Logic cells that feed LAB 'C':
LC37 -> - - * * * - * * * * - | * - * * * * | <-- |NEWHOUR:11|hourt12
LC44 -> - * * * * - * * * * - | - - * * * * | <-- |NEWHOUR:11|hourt11
LC42 -> - * * * * * * * * * - | - - * * * * | <-- |NEWHOUR:11|hourt10
LC35 -> * - - * * - * - * * - | * * * * * * | <-- |NEWHOUR:11|hourt23
LC34 -> * * - * * - * * * * - | * * * * * * | <-- |NEWHOUR:11|hourt22
LC33 -> * * - * * - * * * * - | * * * * * * | <-- |NEWHOUR:11|hourt21
LC36 -> * * - * * - * * * * - | * * * * * * | <-- |NEWHOUR:11|hourt20

Pin
67   -> - - - - - - - - - - - | - - - - - - | <-- clk
13   -> - - - * * * * * * * * | - * * - * * | <-- reset
LC54 -> * - - - - - - - - - - | * - * - - - | <-- |CLK7:12|~325~2
LC95 -> * - - - - - - - - - - | - - * - - - | <-- |CLK7:12|~325~3
LC77 -> * - - - - - - - - - - | - - * - - - | <-- |CLK7:12|~325~4
LC15 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~2
LC96 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~3
LC87 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~4
LC92 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~5
LC88 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~6
LC81 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~7
LC82 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~8
LC71 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~9
LC70 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~10
LC10 -> - * - - - - - - - - - | - - * - - - | <-- |CLK7:12|~332~11
LC86 -> - - - - * - - - - - - | - - * - - - | <-- |NEWHOUR:11|LPM_ADD_SUB:227|addcore:adder|addcore:adder0|result_node1
LC67 -> - - - * - - - - - - - | - - * - - - | <-- |NEWHOUR:11|LPM_ADD_SUB:227|addcore:adder|addcore:adder0|result_node2
LC84 -> - - * * * - * * * * - | * - * * * * | <-- |NEWHOUR:11|hourt13
LC29 -> - - - * * * * * * * - | - * * - - * | <-- |NEWMINUTE:4|:11
LC25 -> - * - - - - - - - - - | - * * * * * | <-- |NEWMINUTE:4|mint11
LC26 -> - * - - - - - - - - - | - * * * * * | <-- |NEWMINUTE:4|mint10
LC27 -> - * - - - - - - - - - | * * * * - * | <-- |NEWMINUTE:4|mint22
LC93 -> - * - - - - - - - - * | - - * * * * | <-- |NEWSECOND:5|sect11
LC31 -> - * - - - - - - - - * | - - * * * * | <-- |NEWSECOND:5|sect10
LC73 -> - * - - - - - - - - - | * - * * * * | <-- |NEWSECOND:5|sect23
LC75 -> - * - - - - - - - - - | * - * * * * | <-- |NEWSECOND:5|sect22
LC32 -> * * - - - - - - - - - | * * * * * * | <-- sel0
LC19 -> * - - - - - - - - - - | * * * * * * | <-- sel1
LC17 -> * * - - - - - - - - - | * * * * * * | <-- sel2


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   e:\wy\clock.rpt
clock

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                                         Logic cells placed in LAB 'D'
        +------------------------------- LC64 |CLK7:12|~324~2
        | +----------------------------- LC59 |CLK7:12|~324~3
        | | +--------------------------- LC54 |CLK7:12|~325~2
        | | | +------------------------- LC60 |CLK7:12|~344~2
        | | | | +----------------------- LC58 |CLK7:12|~344~3
        | | | | | +--------------------- LC55 |CLK7:12|~356~2
        | | | | | | +------------------- LC61 |CLK7:12|~356~3
        | | | | | | | +----------------- LC49 |CLK7:12|~368~2
        | | | | | | | | +--------------- LC50 |CLK7:12|~368~3
        | | | | | | | | | +------------- LC52 |CLK7:12|~404~1
        | | | | | | | | | | +----------- LC62 |CLK7:12|~437~1
        | | | | | | | | | | | +--------- LC53 |CLK7:12|~437~2
        | | | | | | | | | | | | +------- LC63 |CLK7:12|~470~2
        | | | | | | | | | | | | | +----- LC57 |CLK7:12|~503~1
        | | | | | | | | | | | | | | +--- LC51 |CLK7:12|~536~1
        | | | | | | | | | | | | | | | +- LC56 |CLK7:12|~569~1
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'D'
LC      | | | | | | | | | | | | | | | | | A B C D E F |     Logic cells that feed LAB 'D':

Pin
67   -> - - - - - - - - - - - - - - - - | - - - - - - | <-- clk
LC41 -> - - - - - - - - - * * * - - - - | * * - * * * | <-- |CLK7:12|~332~1
LC6  -> - - - - - - - - - * - - - * - - | * * - * * * | <-- |CLK7:12|~344~1
LC13 -> - - - - - - - - - * * * * - - * | * * - * * * | <-- |CLK7:12|~356~1
LC84 -> * * * * * * * * * * * * * * * * | * - * * * * | <-- |NEWHOUR:11|hourt13
LC37 -> * * * * * * * * * * * * * * * * | * - * * * * | <-- |NEWHOUR:11|hourt12
LC44 -> * * * * * * * * * * * * * * * * | - - * * * * | <-- |NEWHOUR:11|hourt11
LC42 -> * * - * * * * * * - * * * - * - | - - * * * * | <-- |NEWHOUR:11|hourt10
LC35 -> - * - * - * - * - - - - - - - - | * * * * * * | <-- |NEWHOUR:11|hourt23
LC34 -> - * - * - * - * - - - - - - - - | * * * * * * | <-- |NEWHOUR:11|hourt22
LC33 -> - * - * - * - * - - - - - - - - | * * * * * * | <-- |NEWHOUR:11|hourt21
LC36 -> - * - * - * - * - - - - - - - - | * * * * * * | <-- |NEWHOUR:11|hourt20
LC18 -> * * * * * * * * * * * * * * * * | * * - * * * | <-- |NEWMINUTE:4|mint13
LC20 -> * * * * * * * * * * * * * * * * | * * - * * * | <-- |NEWMINUTE:4|mint12
LC25 -> * * * * * * * * * * * * * * * * | - * * * * * | <-- |NEWMINUTE:4|mint11
LC26 -> * * - * * * * * * - * * * - * - | - * * * * * | <-- |NEWMINUTE:4|mint10
LC28 -> * * * * * * * * * * * - - * * * | * * - * - * | <-- |NEWMINUTE:4|mint23
LC27 -> * * * * * * * * * * * - - * * * | * * * * - * | <-- |NEWMINUTE:4|mint22
LC22 -> * * * * * * * * * * * - - * * * | - * - * - * | <-- |NEWMINUTE:4|mint21
LC23 -> * * - * * * * * * - * - - - * - | - * - * - * | <-- |NEWMINUTE:4|mint20
LC83 -> * * * * * * * * * * - * * * * * | - - - * * * | <-- |NEWSECOND:5|sect13
LC38 -> * * * * * * * * * * - * * * * * | - - - * * * | <-- |NEWSECOND:5|sect12
LC93 -> * * * * * * * * * * - * * * * * | - - * * * * | <-- |NEWSECOND:5|sect11
LC31 -> * * - * * * * * * - - * * - * - | - - * * * * | <-- |NEWSECOND:5|sect10
LC73 -> * * * * * * * * * * * * * * * * | * - * * * * | <-- |NEWSECOND:5|sect23
LC75 -> * * * * * * * * * * * * * * * * | * - * * * * | <-- |NEWSECOND:5|sect22
LC65 -> * * * * * * * * * * * * * * * * | - - - * * * | <-- |NEWSECOND:5|sect21
LC74 -> * * - * * * * * * - * * * - * - | - - - * * * | <-- |NEWSECOND:5|sect20
LC32 -> * * * * * * * * * * * * * * * * | * * * * * * | <-- sel0
LC19 -> * * * * * * * * * * * * * * * * | * * * * * * | <-- sel1
LC17 -> * * * * * * * * * * * * * * * * | * * * * * * | <-- sel2


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   e:\wy\clock.rpt
clock

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'E':

                                         Logic cells placed in LAB 'E'
        +------------------------------- LC77 |CLK7:12|~325~4
        | +----------------------------- LC71 |CLK7:12|~332~9
        | | +--------------------------- LC70 |CLK7:12|~332~10
        | | | +------------------------- LC76 |CLK7:12|~368~1
        | | | | +----------------------- LC79 |CLK7:12|~569~3
        | | | | | +--------------------- LC66 |M6_1SCAN:2|LPM_ADD_SUB:81|addcore:adder|addcore:adder0|result_node1
        | | | | | | +------------------- LC67 |NEWHOUR:11|LPM_ADD_SUB:227|addcore:adder|addcore:adder0|result_node2
        | | | | | | | +----------------- LC78 |NEWSECOND:5|LPM_ADD_SUB:188|addcore:adder|addcore:adder0|result_node1
        | | | | | | | | +--------------- LC68 |NEWSECOND:5|LPM_ADD_SUB:188|addcore:adder|addcore:adder0|result_node3
        | | | | | | | | | +------------- LC80 |NEWSECOND:5|:11
        | | | | | | | | | | +----------- LC73 |NEWSECOND:5|sect23
        | | | | | | | | | | | +--------- LC75 |NEWSECOND:5|sect22
        | | | | | | | | | | | | +------- LC65 |NEWSECOND:5|sect21
        | | | | | | | | | | | | | +----- LC74 |NEWSECOND:5|sect20
        | | | | | | | | | | | | | | +--- LC72 7seg4
        | | | | | | | | | | | | | | | +- LC69 7seg5
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'E'
LC      | | | | | | | | | | | | | | | | | A B C D E F |     Logic cells that feed LAB 'E':
LC76 -> - - - - - - - - - - - - - - - * | * - - - * - | <-- |CLK7:12|~368~1
LC73 -> * - - - * - - - - * * * * - - * | * - * * * * | <-- |NEWSECOND:5|sect23
LC75 -> * - - - * - - - - * * * * - - * | * - * * * * | <-- |NEWSECOND:5|sect22
LC65 -> * - * - - - - - - * * * * - - - | - - - * * * | <-- |NEWSECOND:5|sect21
LC74 -> * * - - * - - - - * * * * * - - | - - - * * * | <-- |NEWSECOND:5|sect20

Pin
67   -> - - - - - - - - - - - - - - - - | - - - - - - | <-- clk
13   -> - - - - - - - - - * * * * * - - | - * * - * * | <-- reset
LC41 -> - - - - - - - - - - - - - - * * | * * - * * * | <-- |CLK7:12|~332~1
LC6  -> - - - - - - - - - - - - - - * * | * * - * * * | <-- |CLK7:12|~344~1
LC13 -> - - - - * - - - - - - - - - * * | * * - * * * | <-- |CLK7:12|~356~1
LC49 -> - - - * - - - - - - - - - - * - | * * - - * - | <-- |CLK7:12|~368~2
LC50 -> - - - * - - - - - - - - - - * - | * * - - * - | <-- |CLK7:12|~368~3
LC52 -> - - - - - - - - - - - - - - - * | - - - - * - | <-- |CLK7:12|~404~1
LC89 -> - - - - - - - - - - - - - - - * | - - - - * - | <-- |CLK7:12|~404~2
LC62 -> - - - - - - - - - - - - - - * - | - - - - * - | <-- |CLK7:12|~437~1
LC53 -> - - - - - - - - - - - - - - * - | - - - - * - | <-- |CLK7:12|~437~2
LC84 -> * - - - * - - - - - - - - - - - | * - * * * * | <-- |NEWHOUR:11|hourt13
LC37 -> * - - - * - * - - - - - - - - - | * - * * * * | <-- |NEWHOUR:11|hourt12
LC44 -> * * - - - - * - - - - - - - - - | - - * * * * | <-- |NEWHOUR:11|hourt11
LC42 -> * - - - * - * - - - - - - - - - | - - * * * * | <-- |NEWHOUR:11|hourt10
LC35 -> - - * * - - - - - - - - - - * * | * * * * * * | <-- |NEWHOUR:11|hourt23
LC34 -> - - * * - - - - - - - - - - * * | * * * * * * | <-- |NEWHOUR:11|hourt22
LC33 -> - - - * - - - - - - - - - - * - | * * * * * * | <-- |NEWHOUR:11|hourt21
LC36 -> - - - * - - - - - - - - - - * - | * * * * * * | <-- |NEWHOUR:11|hourt20
LC18 -> * - - - * - - - - - - - - - - - | * * - * * * | <-- |NEWMINUTE:4|mint13
LC20 -> * - - - * - - - - - - - - - - - | * * - * * * | <-- |NEWMINUTE:4|mint12
LC25 -> * - - - - - - - - - - - - - - - | - * * * * * | <-- |NEWMINUTE:4|mint11
LC26 -> * - - - * - - - - - - - - - - - | - * * * * * | <-- |NEWMINUTE:4|mint10
LC83 -> * * - - * - - - * * * * * * - * | - - - * * * | <-- |NEWSECOND:5|sect13
LC38 -> * * - - * - - - * * * * * * - * | - - - * * * | <-- |NEWSECOND:5|sect12
LC93 -> * - * - * - - * * * * * * * - - | - - * * * * | <-- |NEWSECOND:5|sect11
LC31 -> * * - - * - - * * * * * * * - - | - - * * * * | <-- |NEWSECOND:5|sect10
LC32 -> * * * * * * - - - - - - - - * * | * * * * * * | <-- sel0
LC19 -> * * * * * * - - - - - - - - * * | * * * * * * | <-- sel1
LC17 -> * * * * * - - - - - - - - - * * | * * * * * * | <-- sel2


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   e:\wy\clock.rpt
clock

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                                         Logic cells placed in LAB 'F'
        +------------------------------- LC95 |CLK7:12|~325~3
        | +----------------------------- LC96 |CLK7:12|~332~3
        | | +--------------------------- LC87 |CLK7:12|~332~4
        | | | +------------------------- LC92 |CLK7:12|~332~5
        | | | | +----------------------- LC88 |CLK7:12|~332~6