驱动led静态显示.txt

本压缩文件包含：使用VHDL来实现对LED的静态显示

--功能：译码输出模块，LED为共阳接法；
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity fpgaqudongled is
       port(seg:in std_logic_vector(3 downto 0);
             q3:out std_logic_vector(6 downto 0) );
end ;
architecture behave of  fpgaqudongled  is 
     begin 
        process(seg)
         begin
         case seg is 
         when "0000"=>q3<="0000001";--0
         when "0001"=>q3<="1001111";--1
         when "0010"=>q3<="0010010";--2
         when "0011"=>q3<="0000110";--3
         when "0100"=>q3<="1001100";--4
         when "0101"=>q3<="0100100";--5
         when "0110"=>q3<="0100000";--6
         when "0111"=>q3<="0001111";--7
         when "1000"=>q3<="0000000";--8
         when "1001"=>q3<="0000100";--9 
         when others=>q3<="1111111";
         end  case;
        end process;
end;