crt0.s

使用sdk读取GIF文件 需要相应的vgsdk库来运行项目

##==============================================================================
##	crt0.S
##	SE3208 startup code
##==============================================================================
## Copyright (c) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 Cygnus Solutions
## The authors hereby grant permission to use, copy, modify, distribute,
## and license this software and its documentation for any purpose, provided
## that existing copyright notices are retained in all copies and that this
## notice is included verbatim in any distributions. No written agreement,
## license, or royalty fee is required for any of the authorized uses.
## Modifications to this software may be copyrighted by their authors
## and need not follow the licensing terms described here, provided that
## the new terms are clearly indicated on the first page of each file where
## they apply.
##==============================================================================

	.file	"crt0.S"
	.section .text
	.global	_vr0_crt0_start
_vr0_crt0_start:
	ldi	_stack-8, %r3	# Load up the stack pointer and allocate ;stack=0x020f:ffff
	lea	(%r3), %sp	# our current frame.
#	jmp	ROMDATA_COPY
# 	jmp _Expansion_ROM_CFG
################################################################################
# PLL Register Set
####################
        ldi	0x01804000,	%R6	# RAMDAC & PLL Control Register
        ldi	0x00000004,	%R7
        st      %R7      ,     (%R6,0)

        ldi	0x01804004,	%R6	# PLL Program Reigster
#        ldi	0x00003e21,	%R7	# 50Mhz
#       ldi	0x0000573E,	%R7	# 20Mhz
#       ldi	0x00006A3A,	%R7	# 25.5Mhz
#       ldi	0x0000A84E,	%R7	# 30Mhz        
#       ldi	0x00005091,	%R7	# 35Mhz
#       ldi	0x0000573D,	%R7	# 40Mhz
#       ldi	0x00009f61,	%R7	# 45.5Mhz
#       ldi	0x0000A151,	%R7	# 55Mhz
#       ldi	0x0000A84D,	%R7	# 60Mhz        
#       ldi	0x00006E2D,	%R7	# 65Mhz        
#       ldi	0x00005040,	%R7	# 70Mhz        
#       ldi	0x0000513C,	%R7	# 75Mhz        
#       ldi	0x0000573C,	%R7	# 80Mhz        
       ldi	0x00005738,	%R7	# 85Mhz        
#       ldi	0x00005130,	%R7	# 90Mhz        
#       ldi	0x00004124,	%R7	# 95Mhz        
#       ldi	0x00003E20,	%R7	# 100Mhz         
        st      %R7      ,     (%R6,0)
###############################################################################
# LOCAL ROM CFG
####################
        ldi	0x01800400,	%R6	# Local DRAM Control Register
        ldi	0x00000082,	%R7
        st      %R7       ,     (%R6,0)
####################
# Sync DRAM
        ldi	0x01800408,	%R6	# Local DRAM Control Register
        ldi	0x00141347,	%R7     #data=0 0001 0100 0001 0011 0100 0111
#        ldi	0x00000013,	%R7     #data=0 0001 0100 0001 0011 0100 0111
        st      %R7       ,     (%R6,0)
##################################################################################

 _Expansion_ROM_CFG:
####################
        ldi	0x01800008,	%R6	# Local ROM Control Register
        ldi	0x00000103,	%R7
        st     %R7       ,     (%R6,0)
################################################################################
        ldi	0x01802414,	%R6	# nPCS5
        ldi	0x00000884,	%R7
        st     %R7       ,     (%R6,0)

        ldi	0x01802418,	%R6	# nPCS6
        ldi	0x00000884,	%R7
        st     %R7       ,     (%R6,0)
################################################################################
# PIN MUX SET
####################
        ldi	0x01800018,	%R6	# Pin Mux Control Register 1
        ldi	0x00000000,	%R7
        st      %R7       ,     (%R6,0)

        ldi	0x0180001C,	%R6	# Pin Mux Control Register 2
        ldi	0x00000004,	%R7
        st      %R7       ,     (%R6,0)
#
#TMEM/FMEM cfg
        ldi	0x03000100,	%R6	
        ldi	0x0000800a,	%R7
        st     %R7       ,     (%R6,0)

/*        ldi	0x03000106,	%R6	
        ldi	0x00000af2,	%R7
        st     %R7       ,     (%R6,0)

        ldi	0x03000108,	%R6	
        ldi	0x00000af2,	%R7
        st     %R7       ,     (%R6,0)
*/
ROMDATA_COPY:
	ldi	_etext, %r3	# ROM has data at end of text; copy it. */
	ldi	_data_reload, %r1
	cmp	%r3, %r1
	jz	.L2		# If no data, then do nothing
        ldi     _edata, %r4
	cmp     %r4 , %r1
	jz	.L2
.L3:
        ldb     (%r3), %r2
        stb     %r2, (%r1)
        addi    %r3, 1, %r3
        addi    %r1, 1, %r1
        cmp     %r4, %r1
        jnz     .L3
################################################################################
BSS_INIT:
.L2:	ldi	_edata, %r3	# Get the start/end of bss
	ldi	_end, %r1

	cmp	%r3, %r1	# If no bss, then do nothing
	jz	.L0

	ldi	0, %r2		# clear %r2
.L1:
	stb	%r2, (%r3)	# Clear a byte and bump pointer
	add	%r3, 1, %r3
	cmp	%r3, %r1
	jnz	.L1
	
.L0:
	call	_main		# Call main program
	.section ._stack
_stack:	.long 	1