test.map.qmsg

vc++与vhdl代码

{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Motor_Width_Ctr\[2\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Motor_Width_Ctr\[2\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Motor_Width_Ctr\[3\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Motor_Width_Ctr\[3\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Motor_Width_Ctr\[4\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Motor_Width_Ctr\[4\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Motor_Width_Ctr\[5\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Motor_Width_Ctr\[5\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Motor_Width_Ctr\[6\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Motor_Width_Ctr\[6\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[0\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[0\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[1\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[1\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[2\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[2\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[3\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[3\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[4\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[4\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[5\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[5\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Servo_Width_Ctr\[6\] SEL.vhd(27) " "Info (10041): Verilog HDL or VHDL info at SEL.vhd(27): inferred latch for \"Servo_Width_Ctr\[6\]\"" {  } { { "SEL.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/SEL.vhd" 27 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RxUnit RxUnit:inst " "Info: Elaborating entity \"RxUnit\" for hierarchy \"RxUnit:inst\"" {  } { { "test.bdf" "inst" { Schematic "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/test.bdf" { { 48 392 536 176 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ClkUnit ClkUnit:inst1 " "Info: Elaborating entity \"ClkUnit\" for hierarchy \"ClkUnit:inst1\"" {  } { { "test.bdf" "inst1" { Schematic "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/test.bdf" { { 48 192 328 144 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst4\|clk_servo PWM:inst3\|clk_servo " "Info: Duplicate register \"PWM:inst4\|clk_servo\" merged to single register \"PWM:inst3\|clk_servo\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 30 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[11\] PWM:inst4\|div_reg_pwm\[11\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[11\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[11\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[10\] PWM:inst4\|div_reg_pwm\[10\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[10\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[10\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[9\] PWM:inst4\|div_reg_pwm\[9\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[9\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[9\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[8\] PWM:inst4\|div_reg_pwm\[8\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[8\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[8\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[0\] PWM:inst4\|div_reg_pwm\[0\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[0\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[0\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[1\] PWM:inst4\|div_reg_pwm\[1\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[1\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[1\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[2\] PWM:inst4\|div_reg_pwm\[2\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[2\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[2\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[3\] PWM:inst4\|div_reg_pwm\[3\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[3\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[3\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[4\] PWM:inst4\|div_reg_pwm\[4\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[4\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[4\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[5\] PWM:inst4\|div_reg_pwm\[5\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[5\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[5\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[6\] PWM:inst4\|div_reg_pwm\[6\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[6\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[6\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "PWM:inst3\|div_reg_pwm\[7\] PWM:inst4\|div_reg_pwm\[7\] " "Info: Duplicate register \"PWM:inst3\|div_reg_pwm\[7\]\" merged to single register \"PWM:inst4\|div_reg_pwm\[7\]\"" {  } { { "PWM.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/小车速度方向控制/vhdl/PWM.vhd" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "172 " "Info: Implemented 172 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "2 " "Info: Implemented 2 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "167 " "Info: Implemented 167 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Sep 21 20:01:11 2007 " "Info: Processing ended: Fri Sep 21 20:01:11 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}