singt.hif

Quartus环境下的正选信号发生器的实验源码

3
data_b3
-1
3
data_b2
-1
3
data_b1
-1
3
data_b0
-1
3
clock1
-1
3
clock0
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
.|dataHEX|SDATA.hex
daf91cd2e11fb7ba32b6670eff3f56e
}
# hierarchies {
data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|altsyncram_71b2:altsyncram1
}
# end
# entity
sld_signaltap
# storage
db|singt.(16).cnf
db|singt.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_signaltap.vhd
bbf1588d946d111db816a1bbbc31be
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
402681344
PARAMETER_UNKNOWN
USR
sld_ip_version
3
PARAMETER_DEC
DEF
sld_ip_minor_version
2
PARAMETER_DEC
DEF
sld_common_ip_version
0
PARAMETER_DEC
DEF
sld_data_bits
14
PARAMETER_UNKNOWN
USR
sld_trigger_bits
14
PARAMETER_UNKNOWN
USR
sld_data_bit_cntr_bits
4
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_DEC
DEF
sld_node_crc_hiword
52833
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
41948
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_DEC
DEF
sld_sample_depth
1024
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
10
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
}
# end
# entity
sld_ela_control
# storage
db|singt.(17).cnf
db|singt.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_ela_control.vhd
bf352f526cd019836bce103d59e72b72
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_input_width
14
PARAMETER_DEC
USR
trigger_level
1
PARAMETER_DEC
USR
trigger_in_enabled
0
PARAMETER_DEC
USR
enable_clk_edge_def
0
PARAMETER_DEC
USR
enable_async_glitch
0
PARAMETER_DEC
USR
enable_sync_normal
1
PARAMETER_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_DEC
USR
trigger_level_pipeline
1
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
sample_depth
1024
PARAMETER_DEC
USR
 constraint(acq_trigger_in)
13 downto 0
PARAMETER_STRING
USR
 constraint(status)
2 downto 0
PARAMETER_STRING
USR
}
# end
# entity
lpm_shiftreg
# storage
db|singt.(18).cnf
db|singt.(18).cnf
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|lpm_shiftreg.tdf
785a3897e231f6ebb4e0644e3aab46e4
6
# user_parameter {
LPM_WIDTH
19
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftout
-1
3
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
load
-1
1
data9
-1
1
data8
-1
1
data7
-1
1
data6
-1
1
data5
-1
1
data4
-1
1
data3
-1
1
data2
-1
1
data18
-1
1
data17
-1
1
data16
-1
1
data15
-1
1
data14
-1
1
data13
-1
1
data12
-1
1
data11
-1
1
data10
-1
1
data1
-1
1
data0
-1
1
}
# include_file {
c:|altera|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
c:|altera|quartus51|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
c:|altera|quartus51|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|singt.(19).cnf
db|singt.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_ela_control.vhd
bf352f526cd019836bce103d59e72b72
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
1
PARAMETER_DEC
USR
data_bits
14
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
sync_enabled
1
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
 constraint(data_in)
13 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_ena)
0 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# end
# entity
lpm_shiftreg
# storage
db|singt.(20).cnf
db|singt.(20).cnf
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|lpm_shiftreg.tdf
785a3897e231f6ebb4e0644e3aab46e4
6
# user_parameter {
LPM_WIDTH
42
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftout
-1
3
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q41
-1
3
q40
-1
3
q4
-1
3
q39
-1
3
q38
-1
3
q37
-1
3
q36
-1
3
q35
-1
3
q34
-1
3
q33
-1
3
q32
-1
3
q31
-1
3
q30
-1
3
q3
-1
3
q29
-1
3
q28
-1
3
q27
-1
3
q26
-1
3
q25
-1
3
q24
-1
3
q23
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2
-1
3
q19
-1
3
q18
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
load
-1
1
data9
-1
1
data8
-1
1
data7
-1
1
data6
-1
1
data5
-1
1
data41
-1
1
data40
-1
1
data4
-1
1
data39
-1
1
data38
-1
1
data37
-1
1
data36
-1
1
data35
-1
1
data34
-1
1
data33
-1
1
data32
-1
1
data31
-1
1
data30
-1
1
data3
-1
1
data29
-1
1
data28
-1
1
data27
-1
1
data26
-1
1
data25
-1
1
data24
-1
1
data23
-1
1
data22
-1
1
data21
-1
1
data20
-1
1
data2
-1
1
data19
-1
1
data18
-1
1
data17
-1
1
data16
-1
1
data15
-1
1
data14
-1
1
data13
-1
1
data12
-1
1
data11
-1
1
data10
-1
1
data1
-1
1
data0
-1
1
}
# include_file {
c:|altera|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
c:|altera|quartus51|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
c:|altera|quartus51|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# end
# entity
sld_mbpmg
# storage
db|singt.(21).cnf
db|singt.(21).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_mbpmg.vhd
9553322d2dfc58cfe81c1837020f892
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
data_bits
14
PARAMETER_DEC
USR
pattern_bits
3
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
sync_enabled
1
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
 constraint(data_in)
13 downto 0
PARAMETER_STRING
USR
 constraint(pattern_in)
41 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_sbpmg
# storage
db|singt.(22).cnf
db|singt.(22).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_mbpmg.vhd
9553322d2dfc58cfe81c1837020f892
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
}
# end
# entity
sld_ela_level_seq_mgr
# storage
db|singt.(23).cnf
db|singt.(23).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_ela_control.vhd
bf352f526cd019836bce103d59e72b72
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
2
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
trigger_in_enabled
0
PARAMETER_DEC
USR
 constraint(trigger_level_matched)
1 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_enabled)
1 downto 0
PARAMETER_STRING
USR
 constraint(trigger_ena)
1 downto 0
PARAMETER_STRING
USR
 constraint(enable_trigger)
1 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_ela_state_machine
# storage
db|singt.(24).cnf
db|singt.(24).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_ela_control.vhd
bf352f526cd019836bce103d59e72b72
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# end
# entity
sld_ela_seg_state_machine
# storage
db|singt.(25).cnf
db|singt.(25).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive