scan_led1000.tan.qmsg

Quartus环境下的1000进制计数器的扫描显示电路

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK1 " "Info: Assuming node \"CLK1\" is an undefined clock" {  } { { "scan_led1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led1000.vhd" 5 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CLK1" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK0 " "Info: Assuming node \"CLK0\" is an undefined clock" {  } { { "scan_led1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led1000.vhd" 4 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CLK0" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "CLK1 register register SCAN_LED:U2\|CNT8\[0\] SCAN_LED:U2\|CNT8\[2\] 275.03 MHz Internal " "Info: Clock \"CLK1\" Internal fmax is restricted to 275.03 MHz between source register \"SCAN_LED:U2\|CNT8\[0\]\" and destination register \"SCAN_LED:U2\|CNT8\[2\]\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "1.818 ns 1.818 ns 3.636 ns " "Info: fmax restricted to Clock High delay (1.818 ns) plus Clock Low delay (1.818 ns) : restricted to 3.636 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.347 ns + Longest register register " "Info: + Longest register to register delay is 1.347 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns SCAN_LED:U2\|CNT8\[0\] 1 REG LC_X18_Y6_N9 16 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X18_Y6_N9; Fanout = 16; REG Node = 'SCAN_LED:U2\|CNT8\[0\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { SCAN_LED:U2|CNT8[0] } "NODE_NAME" } "" } } { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.609 ns) + CELL(0.738 ns) 1.347 ns SCAN_LED:U2\|CNT8\[2\] 2 REG LC_X18_Y6_N7 10 " "Info: 2: + IC(0.609 ns) + CELL(0.738 ns) = 1.347 ns; Loc. = LC_X18_Y6_N7; Fanout = 10; REG Node = 'SCAN_LED:U2\|CNT8\[2\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.347 ns" { SCAN_LED:U2|CNT8[0] SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.738 ns ( 54.79 % ) " "Info: Total cell delay = 0.738 ns ( 54.79 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.609 ns ( 45.21 % ) " "Info: Total interconnect delay = 0.609 ns ( 45.21 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.347 ns" { SCAN_LED:U2|CNT8[0] SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "1.347 ns" { SCAN_LED:U2|CNT8[0] SCAN_LED:U2|CNT8[2] } { 0.000ns 0.609ns } { 0.000ns 0.738ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK1 destination 2.781 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK1\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK1 1 CLK PIN_93 3 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_93; Fanout = 3; CLK Node = 'CLK1'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { CLK1 } "NODE_NAME" } "" } } { "scan_led1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led1000.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns SCAN_LED:U2\|CNT8\[2\] 2 REG LC_X18_Y6_N7 10 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X18_Y6_N7; Fanout = 10; REG Node = 'SCAN_LED:U2\|CNT8\[2\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.312 ns" { CLK1 SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 78.39 % ) " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns ( 21.61 % ) " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK1 SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK1 CLK1~out0 SCAN_LED:U2|CNT8[2] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK1 source 2.781 ns - Longest register " "Info: - Longest clock path from clock \"CLK1\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK1 1 CLK PIN_93 3 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_93; Fanout = 3; CLK Node = 'CLK1'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { CLK1 } "NODE_NAME" } "" } } { "scan_led1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led1000.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns SCAN_LED:U2\|CNT8\[0\] 2 REG LC_X18_Y6_N9 16 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X18_Y6_N9; Fanout = 16; REG Node = 'SCAN_LED:U2\|CNT8\[0\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.312 ns" { CLK1 SCAN_LED:U2|CNT8[0] } "NODE_NAME" } "" } } { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 78.39 % ) " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns ( 21.61 % ) " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK1 SCAN_LED:U2|CNT8[0] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK1 CLK1~out0 SCAN_LED:U2|CNT8[0] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK1 SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK1 CLK1~out0 SCAN_LED:U2|CNT8[2] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK1 SCAN_LED:U2|CNT8[0] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK1 CLK1~out0 SCAN_LED:U2|CNT8[0] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.347 ns" { SCAN_LED:U2|CNT8[0] SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "1.347 ns" { SCAN_LED:U2|CNT8[0] SCAN_LED:U2|CNT8[2] } { 0.000ns 0.609ns } { 0.000ns 0.738ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK1 SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK1 CLK1~out0 SCAN_LED:U2|CNT8[2] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK1 SCAN_LED:U2|CNT8[0] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK1 CLK1~out0 SCAN_LED:U2|CNT8[0] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "fmax restricted to Clock High delay (%1!s!) plus Clock Low delay (%2!s!) : restricted to %3!s!. Expand message to see actual delay path." 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { SCAN_LED:U2|CNT8[2] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { SCAN_LED:U2|CNT8[2] } {  } {  } } } { "scan_led.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led.vhd" 30 -1 0 } }  } 0 0 "Clock \"%1!s!\" %7!s! fmax is restricted to %6!s! between source %2!s! \"%4!s!\" and destination %3!s! \"%5!s!\"" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK0 register CNT1000:U1\|C1\[3\] register CNT1000:U1\|C2\[3\] 118.12 MHz 8.466 ns Internal " "Info: Clock \"CLK0\" has Internal fmax of 118.12 MHz between source register \"CNT1000:U1\|C1\[3\]\" and destination register \"CNT1000:U1\|C2\[3\]\" (period= 8.466 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.205 ns + Longest register register " "Info: + Longest register to register delay is 8.205 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns CNT1000:U1\|C1\[3\] 1 REG LC_X19_Y7_N8 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X19_Y7_N8; Fanout = 7; REG Node = 'CNT1000:U1\|C1\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { CNT1000:U1|C1[3] } "NODE_NAME" } "" } } { "CNT1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/CNT1000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.006 ns) + CELL(0.442 ns) 2.448 ns CNT1000:U1\|process0~361 2 COMB LC_X18_Y7_N1 3 " "Info: 2: + IC(2.006 ns) + CELL(0.442 ns) = 2.448 ns; Loc. = LC_X18_Y7_N1; Fanout = 3; COMB Node = 'CNT1000:U1\|process0~361'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.448 ns" { CNT1000:U1|C1[3] CNT1000:U1|process0~361 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.421 ns) + CELL(0.114 ns) 2.983 ns CNT1000:U1\|add~829 3 COMB LC_X18_Y7_N0 4 " "Info: 3: + IC(0.421 ns) + CELL(0.114 ns) = 2.983 ns; Loc. = LC_X18_Y7_N0; Fanout = 4; COMB Node = 'CNT1000:U1\|add~829'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "0.535 ns" { CNT1000:U1|process0~361 CNT1000:U1|add~829 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.443 ns) + CELL(0.114 ns) 3.540 ns CNT1000:U1\|add~830 4 COMB LC_X18_Y7_N7 5 " "Info: 4: + IC(0.443 ns) + CELL(0.114 ns) = 3.540 ns; Loc. = LC_X18_Y7_N7; Fanout = 5; COMB Node = 'CNT1000:U1\|add~830'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "0.557 ns" { CNT1000:U1|add~829 CNT1000:U1|add~830 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.463 ns) + CELL(0.590 ns) 4.593 ns CNT1000:U1\|process0~362 5 COMB LC_X18_Y7_N5 6 " "Info: 5: + IC(0.463 ns) + CELL(0.590 ns) = 4.593 ns; Loc. = LC_X18_Y7_N5; Fanout = 6; COMB Node = 'CNT1000:U1\|process0~362'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.053 ns" { CNT1000:U1|add~830 CNT1000:U1|process0~362 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.832 ns) + CELL(0.292 ns) 5.717 ns rtl~114 6 COMB LC_X17_Y7_N1 4 " "Info: 6: + IC(0.832 ns) + CELL(0.292 ns) = 5.717 ns; Loc. = LC_X17_Y7_N1; Fanout = 4; COMB Node = 'rtl~114'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.124 ns" { CNT1000:U1|process0~362 rtl~114 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.699 ns) + CELL(0.590 ns) 7.006 ns CNT1000:U1\|process0~364 7 COMB LC_X18_Y7_N2 2 " "Info: 7: + IC(0.699 ns) + CELL(0.590 ns) = 7.006 ns; Loc. = LC_X18_Y7_N2; Fanout = 2; COMB Node = 'CNT1000:U1\|process0~364'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.289 ns" { rtl~114 CNT1000:U1|process0~364 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.461 ns) + CELL(0.738 ns) 8.205 ns CNT1000:U1\|C2\[3\] 8 REG LC_X18_Y7_N6 4 " "Info: 8: + IC(0.461 ns) + CELL(0.738 ns) = 8.205 ns; Loc. = LC_X18_Y7_N6; Fanout = 4; REG Node = 'CNT1000:U1\|C2\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.199 ns" { CNT1000:U1|process0~364 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "CNT1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/CNT1000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.880 ns ( 35.10 % ) " "Info: Total cell delay = 2.880 ns ( 35.10 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.325 ns ( 64.90 % ) " "Info: Total interconnect delay = 5.325 ns ( 64.90 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "8.205 ns" { CNT1000:U1|C1[3] CNT1000:U1|process0~361 CNT1000:U1|add~829 CNT1000:U1|add~830 CNT1000:U1|process0~362 rtl~114 CNT1000:U1|process0~364 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "8.205 ns" { CNT1000:U1|C1[3] CNT1000:U1|process0~361 CNT1000:U1|add~829 CNT1000:U1|add~830 CNT1000:U1|process0~362 rtl~114 CNT1000:U1|process0~364 CNT1000:U1|C2[3] } { 0.000ns 2.006ns 0.421ns 0.443ns 0.463ns 0.832ns 0.699ns 0.461ns } { 0.000ns 0.442ns 0.114ns 0.114ns 0.590ns 0.292ns 0.590ns 0.738ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK0 destination 2.781 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK0\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK0 1 CLK PIN_17 15 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 15; CLK Node = 'CLK0'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { CLK0 } "NODE_NAME" } "" } } { "scan_led1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led1000.vhd" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns CNT1000:U1\|C2\[3\] 2 REG LC_X18_Y7_N6 4 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X18_Y7_N6; Fanout = 4; REG Node = 'CNT1000:U1\|C2\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.312 ns" { CLK0 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "CNT1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/CNT1000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 78.39 % ) " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns ( 21.61 % ) " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK0 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK0 CLK0~out0 CNT1000:U1|C2[3] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK0 source 2.781 ns - Longest register " "Info: - Longest clock path from clock \"CLK0\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK0 1 CLK PIN_17 15 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 15; CLK Node = 'CLK0'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "" { CLK0 } "NODE_NAME" } "" } } { "scan_led1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/scan_led1000.vhd" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns CNT1000:U1\|C1\[3\] 2 REG LC_X19_Y7_N8 7 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X19_Y7_N8; Fanout = 7; REG Node = 'CNT1000:U1\|C1\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "1.312 ns" { CLK0 CNT1000:U1|C1[3] } "NODE_NAME" } "" } } { "CNT1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/CNT1000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 78.39 % ) " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns ( 21.61 % ) " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK0 CNT1000:U1|C1[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK0 CLK0~out0 CNT1000:U1|C1[3] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK0 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK0 CLK0~out0 CNT1000:U1|C2[3] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK0 CNT1000:U1|C1[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK0 CLK0~out0 CNT1000:U1|C1[3] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "CNT1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/CNT1000.vhd" 20 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "CNT1000.vhd" "" { Text "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/CNT1000.vhd" 20 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "8.205 ns" { CNT1000:U1|C1[3] CNT1000:U1|process0~361 CNT1000:U1|add~829 CNT1000:U1|add~830 CNT1000:U1|process0~362 rtl~114 CNT1000:U1|process0~364 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "8.205 ns" { CNT1000:U1|C1[3] CNT1000:U1|process0~361 CNT1000:U1|add~829 CNT1000:U1|add~830 CNT1000:U1|process0~362 rtl~114 CNT1000:U1|process0~364 CNT1000:U1|C2[3] } { 0.000ns 2.006ns 0.421ns 0.443ns 0.463ns 0.832ns 0.699ns 0.461ns } { 0.000ns 0.442ns 0.114ns 0.114ns 0.590ns 0.292ns 0.590ns 0.738ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK0 CNT1000:U1|C2[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK0 CLK0~out0 CNT1000:U1|C2[3] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "scan_led1000" "UNKNOWN" "V1" "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/db/scan_led1000.quartus_db" { Floorplan "F:/学习课件/大四上/综合课程设计/实验程序/scan_led1000/" "" "2.781 ns" { CLK0 CNT1000:U1|C1[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.781 ns" { CLK0 CLK0~out0 CNT1000:U1|C1[3] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}