scan_led1000.vhd

来自「Quartus环境下的1000进制计数器的扫描显示电路」· VHDL 代码 · 共 42 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY SCAN_LED1000 IS
PORT (    CLK0:  IN STD_LOGIC;
          CLK1:  IN STD_LOGIC;
          RST:  IN STD_LOGIC;
          EN:  IN STD_LOGIC;
          SG: OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
           BT: OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
         COUT: OUT STD_LOGIC);
END;

ARCHITECTURE BEHAVE OF SCAN_LED1000 IS

COMPONENT SCAN_LED IS
  PORT (CLK :IN  STD_LOGIC;
         SG :OUT STD_LOGIC_VECTOR(6 DOWNTO 0);      -----段控制信号输出
         BT :OUT STD_LOGIC_VECTOR(7 DOWNTO 0);     -----位控制信号输出 
        CP1:IN  STD_LOGIC_VECTOR(3 DOWNTO 0);
        CP2:IN  STD_LOGIC_VECTOR(3 DOWNTO 0);
        CP3:IN  STD_LOGIC_VECTOR(3 DOWNTO 0));
END COMPONENT;
 
COMPONENT CNT1000
  PORT (CLK,RST,EN: IN STD_LOGIC; 
               CQ1:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
               CQ2:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
               CQ3:OUT STD_LOGIC_VECTOR(3 DOWNTO 0); 
               COUT3:OUT STD_LOGIC );
END COMPONENT;

SIGNAL qa: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL qb: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL qc: STD_LOGIC_VECTOR(3 DOWNTO 0);


BEGIN

U1:CNT1000   PORT MAP (CLK=>CLK0,RST=>RST,EN=>EN,COUT3=>COUT,CQ1=>qa,CQ2=>qb,CQ3=>qc);
U2:SCAN_LED  PORT MAP (CLK=>CLK1,CP1=>qa,CP2=>qb,CP3=>qc,SG=>SG,BT=>BT);

END BEHAVE;