sent.hif

用verilog实现的串口收发数据程序

PARAMETER_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_FFTYPE
DFF
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data1
data2
data3
data4
data5
data6
enable
q0
q1
q2
q3
q4
q5
q6
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
}
# end
# entity
altsyncram
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|altsyncram.tdf
1114012438
6
# storage
db|sent.(32).cnf
db|sent.(32).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
1
PARAMETER_DEC
USR
WIDTHAD_A
7
PARAMETER_DEC
USR
NUMWORDS_A
1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
1
PARAMETER_DEC
USR
WIDTHAD_B
7
PARAMETER_DEC
USR
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_1c92
PARAMETER_UNKNOWN
USR
}
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
address_a5
address_a6
address_b0
address_b1
address_b2
address_b3
address_b4
address_b5
address_b6
clock0
clock1
clocken1
data_a0
q_b0
wren_a
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
d:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
d:|altera|quartus50|libraries|megafunctions|stratix_ram_block.inc
1107575592
d:|altera|quartus50|libraries|megafunctions|lpm_mux.inc
1107574776
d:|altera|quartus50|libraries|megafunctions|a_rdenreg.inc
1107572148
d:|altera|quartus50|libraries|megafunctions|altsyncram.inc
1107573506
d:|altera|quartus50|libraries|megafunctions|altrom.inc
1107573422
d:|altera|quartus50|libraries|megafunctions|altram.inc
1107573384
d:|altera|quartus50|libraries|megafunctions|altqpram.inc
1107573362
d:|altera|quartus50|libraries|megafunctions|altdpram.inc
1107573082
}
# end
# entity
sld_offload_buffer_mgr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|sld_acquisition_buffer.vhd
1131032876
4
# storage
db|sent.(34).cnf
db|sent.(34).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
buffer_depth
128
PARAMETER_DEC
USR
mem_address_bits
7
PARAMETER_DEC
USR
data_bits
1
PARAMETER_DEC
USR
data_bit_cntr_bits
1
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1131033074
6
# storage
db|sent.(35).cnf
db|sent.(35).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
7
PARAMETER_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
128
PARAMETER_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_nk7
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
q4
q5
q6
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
d:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
d:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107573980
d:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
d:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
d:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107574548
d:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107572664
d:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107572680
d:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107572320
d:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107572334
}
# end
# entity
cntr_nk7
# case_insensitive
# source_file
db|cntr_nk7.tdf
1197118366
6
# storage
db|sent.(36).cnf
db|sent.(36).cnf
# used_port {
clock
clk_en
aclr
q0
q1
q2
q3
q4
q5
q6
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|sent.(37).cnf
db|sent.(37).cnf
# user_parameter {
LPM_WIDTH
1
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
enable
load
shiftin
shiftout
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|sent.(38).cnf
db|sent.(38).cnf
# user_parameter {
LPM_WIDTH
15
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data10
data11
data12
data13
data14
data1
data2
data3
data4
data5
data6
data7
data8
data9
enable
load
shiftin
shiftout
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
}
# end
# entity
sld_rom_sr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|sld_rom_sr.vhd
1131032874
4
# storage
db|sent.(39).cnf
db|sent.(39).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
32
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# end
# entity
sld_hub
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
4
# storage
db|sent.(40).cnf
db|sent.(40).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
2
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
7
PARAMETER_UNKNOWN
USR
node_info
00011000000000000110111000000000
PARAMETER_BIN
USR
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
}
# end
# entity
sld_jtag_state_machine
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
4
# storage
db|sent.(41).cnf
db|sent.(41).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|sent.(42).cnf
db|sent.(42).cnf
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
enable
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
}
# end
# entity
lpm_decode
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_decode.tdf
1114012450
6
# storage
db|sent.(43).cnf
db|sent.(43).cnf
# user_parameter {
LPM_WIDTH
3
PARAMETER_DEC
USR
LPM_DECODES
8
PARAMETER_DEC
USR
LPM_PIPELINE
1
PARAMETER_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_9ie
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq7
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
d:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
d:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
d:|altera|quartus50|libraries|megafunctions|declut.inc
1107574136
}
# end
# entity
decode_9ie
# case_insensitive
# source_file
db|decode_9ie.tdf
1197118370
6
# storage
db|sent.(44).cnf
db|sent.(44).cnf
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq4
eq5
eq6
eq7
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1131032874
4
# storage
db|sent.(45).cnf
db|sent.(45).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF