rec.fit.eqn

用verilog实现的串口收发数据程序

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--C1_data_out[7] is test_rec:inst1|data_out[7] at LC_X13_Y14_N9
--operation mode is normal

C1_data_out[7]_lut_out = GND;
C1_data_out[7] = DFFEAS(C1_data_out[7]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, rxd, , , VCC);


--C1_data_out[6] is test_rec:inst1|data_out[6] at LC_X13_Y14_N0
--operation mode is normal

C1_data_out[6]_lut_out = GND;
C1_data_out[6] = DFFEAS(C1_data_out[6]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[7], , , VCC);


--C1_data_out[5] is test_rec:inst1|data_out[5] at LC_X12_Y14_N7
--operation mode is normal

C1_data_out[5]_lut_out = GND;
C1_data_out[5] = DFFEAS(C1_data_out[5]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[6], , , VCC);


--C1_data_out[4] is test_rec:inst1|data_out[4] at LC_X12_Y14_N9
--operation mode is normal

C1_data_out[4]_lut_out = GND;
C1_data_out[4] = DFFEAS(C1_data_out[4]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[5], , , VCC);


--C1_data_out[3] is test_rec:inst1|data_out[3] at LC_X12_Y14_N2
--operation mode is normal

C1_data_out[3]_lut_out = GND;
C1_data_out[3] = DFFEAS(C1_data_out[3]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[4], , , VCC);


--C1_data_out[2] is test_rec:inst1|data_out[2] at LC_X12_Y14_N4
--operation mode is normal

C1_data_out[2]_lut_out = GND;
C1_data_out[2] = DFFEAS(C1_data_out[2]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[3], , , VCC);


--C1_data_out[1] is test_rec:inst1|data_out[1] at LC_X16_Y14_N2
--operation mode is normal

C1_data_out[1]_lut_out = GND;
C1_data_out[1] = DFFEAS(C1_data_out[1]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[2], , , VCC);


--C1_data_out[0] is test_rec:inst1|data_out[0] at LC_X16_Y14_N7
--operation mode is normal

C1_data_out[0]_lut_out = GND;
C1_data_out[0] = DFFEAS(C1_data_out[0]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L32, C1_data_out[1], , , VCC);


--C1_state[1] is test_rec:inst1|state[1] at LC_X16_Y15_N2
--operation mode is normal

C1_state[1]_lut_out = C1_state[1] $ (!C1L25 & !C1L15 & !C1L45);
C1_state[1] = DFFEAS(C1_state[1]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , , , , , );


--C1_state[0] is test_rec:inst1|state[0] at LC_X15_Y16_N7
--operation mode is normal

C1_state[0]_lut_out = C1L25 & !C1L45 # !C1L25 & (C1L15 & !C1L45 # !C1L15 & (C1L22));
C1_state[0] = DFFEAS(C1_state[0]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , , , , , );


--A1L6 is altera_internal_jtag~TDO at JTAG_X1_Y10_N1
A1L6 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !E1_hub_tdo);

--A1L7 is altera_internal_jtag~TMSUTAP at JTAG_X1_Y10_N1
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !E1_hub_tdo);

--A1L5 is altera_internal_jtag~TCKUTAP at JTAG_X1_Y10_N1
A1L5 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !E1_hub_tdo);

--altera_internal_jtag is altera_internal_jtag at JTAG_X1_Y10_N1
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !E1_hub_tdo);


--B1_CLK_OUT is did:inst|CLK_OUT at LC_X8_Y10_N6
--operation mode is normal

B1_CLK_OUT_lut_out = B1_num[5] # B1_num[3] & B1_num[4] & !B1L2;
B1_CLK_OUT = DFFEAS(B1_CLK_OUT_lut_out, GLOBAL(CLK), VCC, , , , , , );


--C1_num[3] is test_rec:inst1|num[3] at LC_X15_Y16_N5
--operation mode is normal

C1_num[3]_lut_out = C1L1 & (C1_num[3] & (!C1L84) # !C1_num[3] & C1L45 & C1L84);
C1_num[3] = DFFEAS(C1_num[3]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L04, , , , );


--C1_num[2] is test_rec:inst1|num[2] at LC_X15_Y16_N1
--operation mode is normal

C1_num[2]_lut_out = C1L2 & (C1_num[2] $ (C1_num[0] & C1_num[1]));
C1_num[2] = DFFEAS(C1_num[2]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L04, , , , );


--C1_num[1] is test_rec:inst1|num[1] at LC_X15_Y16_N4
--operation mode is normal

C1_num[1]_lut_out = C1L2 & (C1_num[0] $ C1_num[1]);
C1_num[1] = DFFEAS(C1_num[1]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L04, , , , );


--C1_num[0] is test_rec:inst1|num[0] at LC_X15_Y16_N0
--operation mode is normal

C1_num[0]_lut_out = !C1_num[0] & (C1L2);
C1_num[0] = DFFEAS(C1_num[0]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L04, , , , );


--C1L54 is test_rec:inst1|reduce_nor~3 at LC_X15_Y16_N2
--operation mode is normal

C1L54 = C1_num[2] & C1_num[3] & C1_num[1] & C1_num[0];


--C1L22 is test_rec:inst1|data_out[7]~58 at LC_X15_Y14_N9
--operation mode is normal

C1L22 = !C1_state[0] & (C1_state[1]);


--C1L45 is test_rec:inst1|state~445 at LC_X16_Y15_N3
--operation mode is normal

C1L45 = !C1_state[0] & (C1_state[1] # rxd);


--C1_bit[2] is test_rec:inst1|bit[2] at LC_X15_Y15_N1
--operation mode is normal

C1_bit[2]_lut_out = C1L21 & (C1_bit[2]) # !C1L21 & C1L8 & (C1L4 $ C1_bit[2]);
C1_bit[2] = DFFEAS(C1_bit[2]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , , , , , );


--C1_bit[1] is test_rec:inst1|bit[1] at LC_X15_Y15_N7
--operation mode is normal

C1_bit[1]_lut_out = C1L21 & C1_bit[1] # !C1L21 & C1L8 & (C1_bit[1] $ C1L5);
C1_bit[1] = DFFEAS(C1_bit[1]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , , , , , );


--C1_bit[0] is test_rec:inst1|bit[0] at LC_X15_Y15_N3
--operation mode is normal

C1_bit[0]_lut_out = C1L21 & (C1_bit[0]) # !C1L21 & C1L8 & (C1_bit[0] $ C1L54);
C1_bit[0] = DFFEAS(C1_bit[0]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , , , , , );


--C1L11 is test_rec:inst1|bit[2]~583 at LC_X15_Y15_N5
--operation mode is normal

C1L11 = C1_bit[1] & (C1_bit[2] & C1_bit[0]);


--C1L15 is test_rec:inst1|state[0]~446 at LC_X15_Y16_N6
--operation mode is normal

C1L15 = C1L45 & C1_state[1] & (!C1L11 # !C1L54);


--C1_n[3] is test_rec:inst1|n[3] at LC_X16_Y15_N8
--operation mode is arithmetic

C1_n[3]_lut_out = C1_n[3] $ C1L23;
C1_n[3] = DFFEAS(C1_n[3]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L3, , , C1L45, );

--C1L53 is test_rec:inst1|n[3]~91 at LC_X16_Y15_N8
--operation mode is arithmetic

C1L53_cout_0 = !C1L23 # !C1_n[3];
C1L53 = CARRY(C1L53_cout_0);

--C1L63 is test_rec:inst1|n[3]~91COUT1_113 at LC_X16_Y15_N8
--operation mode is arithmetic

C1L63_cout_1 = !C1L33 # !C1_n[3];
C1L63 = CARRY(C1L63_cout_1);


--C1_n[0] is test_rec:inst1|n[0] at LC_X16_Y15_N5
--operation mode is arithmetic

C1_n[0]_lut_out = C1L64 $ C1_n[0];
C1_n[0] = DFFEAS(C1_n[0]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L3, , , C1L45, );

--C1L62 is test_rec:inst1|n[0]~95 at LC_X16_Y15_N5
--operation mode is arithmetic

C1L62_cout_0 = C1L64 & C1_n[0];
C1L62 = CARRY(C1L62_cout_0);

--C1L72 is test_rec:inst1|n[0]~95COUT1_111 at LC_X16_Y15_N5
--operation mode is arithmetic

C1L72_cout_1 = C1L64 & C1_n[0];
C1L72 = CARRY(C1L72_cout_1);


--C1_n[1] is test_rec:inst1|n[1] at LC_X16_Y15_N6
--operation mode is arithmetic

C1_n[1]_lut_out = C1_n[1] $ (C1L62);
C1_n[1] = DFFEAS(C1_n[1]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L3, , , C1L45, );

--C1L92 is test_rec:inst1|n[1]~99 at LC_X16_Y15_N6
--operation mode is arithmetic

C1L92_cout_0 = !C1L62 # !C1_n[1];
C1L92 = CARRY(C1L92_cout_0);

--C1L03 is test_rec:inst1|n[1]~99COUT1 at LC_X16_Y15_N6
--operation mode is arithmetic

C1L03_cout_1 = !C1L72 # !C1_n[1];
C1L03 = CARRY(C1L03_cout_1);


--C1L74 is test_rec:inst1|reduce_nor~64 at LC_X16_Y15_N0
--operation mode is normal

C1L74 = !C1_n[1] # !C1_n[0];


--C1_n[4] is test_rec:inst1|n[4] at LC_X16_Y15_N9
--operation mode is normal

C1_n[4]_lut_out = C1_n[4] $ (!C1L53);
C1_n[4] = DFFEAS(C1_n[4]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L3, , , C1L45, );


--C1_n[2] is test_rec:inst1|n[2] at LC_X16_Y15_N7
--operation mode is arithmetic

C1_n[2]_lut_out = C1_n[2] $ (!C1L92);
C1_n[2] = DFFEAS(C1_n[2]_lut_out, GLOBAL(B1_CLK_OUT), VCC, , C1L3, , , C1L45, );

--C1L23 is test_rec:inst1|n[2]~107 at LC_X16_Y15_N7
--operation mode is arithmetic

C1L23_cout_0 = C1_n[2] & (!C1L92);
C1L23 = CARRY(C1L23_cout_0);

--C1L33 is test_rec:inst1|n[2]~107COUT1_112 at LC_X16_Y15_N7
--operation mode is arithmetic

C1L33_cout_1 = C1_n[2] & (!C1L03);
C1L33 = CARRY(C1L33_cout_1);


--C1L64 is test_rec:inst1|reduce_nor~4 at LC_X16_Y15_N1
--operation mode is normal

C1L64 = C1_n[3] # C1L74 # !C1_n[4] # !C1_n[2];


--C1L44 is test_rec:inst1|reduce_nor~1 at LC_X15_Y16_N8
--operation mode is normal

C1L44 = C1_num[2] & !C1_num[3] & C1_num[1] & C1_num[0];


--C1L25 is test_rec:inst1|state[0]~447 at LC_X16_Y15_N4
--operation mode is normal

C1L25 = !C1L45 & (C1_state[1] & (C1L64) # !C1_state[1] & !C1L44);


--E1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo at LC_X15_Y11_N0
--operation mode is normal

E1_hub_tdo = AMPP_FUNCTION(!A1L5, E1L51, E1L31, E1L71, E1L91, !KB1_state[8], KB1L81);


--B1_num[2] is did:inst|num[2] at LC_X9_Y10_N9
--operation mode is normal

B1_num[2]_lut_out = B1L3 & (B1L72 # !B1_num[0] # !B1_num[1]);
B1_num[2] = DFFEAS(B1_num[2]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--B1L2 is did:inst|LessThan~83 at LC_X8_Y10_N2
--operation mode is normal

B1_num[1]_qfbk = B1_num[1];
B1L2 = !B1_num[1]_qfbk & !B1_num[2];

--B1_num[1] is did:inst|num[1] at LC_X8_Y10_N2
--operation mode is normal

B1_num[1] = DFFEAS(B1L2, GLOBAL(CLK), VCC, , , B1L6, , , VCC);


--B1_num[4] is did:inst|num[4] at LC_X9_Y10_N0
--operation mode is normal

B1_num[4]_lut_out = B1L9 & (B1L72 # !B1_num[1] # !B1_num[0]);
B1_num[4] = DFFEAS(B1_num[4]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--B1_num[5] is did:inst|num[5] at LC_X9_Y10_N7
--operation mode is normal

B1_num[5]_lut_out = B1L61 & (B1L72 # !B1_num[0] # !B1_num[1]);
B1_num[5] = DFFEAS(B1_num[5]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--C1L1 is test_rec:inst1|Select~548 at LC_X15_Y14_N0
--operation mode is normal

C1L1 = C1_state[0] # C1_state[1] # !rxd;


--C1L84 is test_rec:inst1|reduce_nor~65 at LC_X15_Y17_N2
--operation mode is normal

C1L84 = C1_num[2] & C1_num[1] & C1_num[0];


--C1L04 is test_rec:inst1|num[0]~86 at LC_X15_Y14_N1
--operation mode is normal

C1L04 = !C1_state[1] # !C1_state[0];


--C1L2 is test_rec:inst1|Select~550 at LC_X15_Y16_N3
--operation mode is normal

C1L2 = C1L1 & (C1L45 & !C1L54 # !C1L45 & (!C1L44));