📄 rec.tan.rpt
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; N/A ; 126.89 MHz ( period = 7.881 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[7] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[5] ; CLK ; CLK ; None ; None ; 7.652 ns ;
; N/A ; 126.89 MHz ( period = 7.881 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[7] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[0] ; CLK ; CLK ; None ; None ; 7.652 ns ;
; N/A ; 126.89 MHz ( period = 7.881 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[7] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[1] ; CLK ; CLK ; None ; None ; 7.652 ns ;
; N/A ; 126.89 MHz ( period = 7.881 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[7] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[2] ; CLK ; CLK ; None ; None ; 7.652 ns ;
; N/A ; 127.10 MHz ( period = 7.868 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|match_out ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable ; CLK ; CLK ; None ; None ; 7.556 ns ;
; N/A ; 129.22 MHz ( period = 7.739 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|match_out ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[0] ; CLK ; CLK ; None ; None ; 7.427 ns ;
; N/A ; 129.55 MHz ( period = 7.719 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|match_out ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[0] ; CLK ; CLK ; None ; None ; 7.407 ns ;
; N/A ; 129.72 MHz ( period = 7.709 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[10] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[3] ; CLK ; CLK ; None ; None ; 7.480 ns ;
; N/A ; 129.72 MHz ( period = 7.709 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[10] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[4] ; CLK ; CLK ; None ; None ; 7.480 ns ;
; N/A ; 129.72 MHz ( period = 7.709 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[10] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[5] ; CLK ; CLK ; None ; None ; 7.480 ns ;
; N/A ; 129.72 MHz ( period = 7.709 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[10] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[0] ; CLK ; CLK ; None ; None ; 7.480 ns ;
; N/A ; 129.72 MHz ( period = 7.709 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[10] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[1] ; CLK ; CLK ; None ; None ; 7.480 ns ;
; N/A ; 129.72 MHz ( period = 7.709 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[10] ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_g29:auto_generated|safe_q[2] ; CLK ; CLK ; None ; None ; 7.480 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg11 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg10 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg9 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg8 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg7 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg6 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg5 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg4 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg3 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg2 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg1 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg0 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 129.89 MHz ( period = 7.699 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[2] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_datain_reg0 ; CLK ; CLK ; None ; None ; 7.452 ns ;
; N/A ; 130.77 MHz ( period = 7.647 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|match_out ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable ; CLK ; CLK ; None ; None ; 7.335 ns ;
; N/A ; 131.11 MHz ( period = 7.627 ns ) ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|match_out ; sld_signaltap:rec|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable ; CLK ; CLK ; None ; None ; 7.315 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg11 ; CLK ; CLK ; None ; None ; 7.378 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg10 ; CLK ; CLK ; None ; None ; 7.378 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg9 ; CLK ; CLK ; None ; None ; 7.378 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg8 ; CLK ; CLK ; None ; None ; 7.378 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg7 ; CLK ; CLK ; None ; None ; 7.378 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg6 ; CLK ; CLK ; None ; None ; 7.378 ns ;
; N/A ; 131.15 MHz ( period = 7.625 ns ) ; sld_signaltap:rec|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_5u9:auto_generated|safe_q[3] ; sld_signaltap:rec|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_rh92:auto_generated|ram_block1a2~porta_address_reg5 ; CLK ; CLK ; None ; None ; 7.378 ns ;
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