vesa_vga_timesim.sdf

本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證

          (PORT I4 (6200:6200:6200)(6200:6200:6200))
          (PORT I5 (6200:6200:6200)(6200:6200:6200))
          (PORT I6 (6200:6200:6200)(6200:6200:6200))
          (PORT I7 (6200:6200:6200)(6200:6200:6200))
          (PORT I8 (6200:6200:6200)(6200:6200:6200))
          (PORT I9 (6200:6200:6200)(6200:6200:6200))
          (PORT I10 (6200:6200:6200)(6200:6200:6200))
          (PORT I11 (6200:6200:6200)(6200:6200:6200))
          (PORT I12 (6200:6200:6200)(6200:6200:6200))
          (PORT I13 (6200:6200:6200)(6200:6200:6200))
          (PORT I14 (6200:6200:6200)(6200:6200:6200))
          (PORT I15 (6200:6200:6200)(6200:6200:6200))
          (PORT I16 (6200:6200:6200)(6200:6200:6200))
          (PORT I17 (6200:6200:6200)(6200:6200:6200))
          (PORT I18 (6200:6200:6200)(6200:6200:6200))
          (PORT I19 (6200:6200:6200)(6200:6200:6200))
          (PORT I20 (6200:6200:6200)(6200:6200:6200))
          (PORT I21 (0:0:0)(0:0:0))
          (PORT I22 (0:0:0)(0:0:0))
          (PORT I23 (0:0:0)(0:0:0))
          (PORT I24 (0:0:0)(0:0:0))
          (PORT I25 (0:0:0)(0:0:0))
          (PORT I26 (0:0:0)(0:0:0))
          (PORT I27 (0:0:0)(0:0:0))
          (PORT I28 (0:0:0)(0:0:0))
          (PORT I29 (0:0:0)(0:0:0))
          (PORT I30 (0:0:0)(0:0:0))
          (PORT I31 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
          (IOPATH I3 O (0:0:0)(0:0:0))
          (IOPATH I4 O (0:0:0)(0:0:0))
          (IOPATH I5 O (0:0:0)(0:0:0))
          (IOPATH I6 O (0:0:0)(0:0:0))
          (IOPATH I7 O (0:0:0)(0:0:0))
          (IOPATH I8 O (0:0:0)(0:0:0))
          (IOPATH I9 O (0:0:0)(0:0:0))
          (IOPATH I10 O (0:0:0)(0:0:0))
          (IOPATH I11 O (0:0:0)(0:0:0))
          (IOPATH I12 O (0:0:0)(0:0:0))
          (IOPATH I13 O (0:0:0)(0:0:0))
          (IOPATH I14 O (0:0:0)(0:0:0))
          (IOPATH I15 O (0:0:0)(0:0:0))
          (IOPATH I16 O (0:0:0)(0:0:0))
          (IOPATH I17 O (0:0:0)(0:0:0))
          (IOPATH I18 O (0:0:0)(0:0:0))
          (IOPATH I19 O (0:0:0)(0:0:0))
          (IOPATH I20 O (0:0:0)(0:0:0))
          (IOPATH I21 O (0:0:0)(0:0:0))
          (IOPATH I22 O (0:0:0)(0:0:0))
          (IOPATH I23 O (0:0:0)(0:0:0))
          (IOPATH I24 O (0:0:0)(0:0:0))
          (IOPATH I25 O (0:0:0)(0:0:0))
          (IOPATH I26 O (0:0:0)(0:0:0))
          (IOPATH I27 O (0:0:0)(0:0:0))
          (IOPATH I28 O (0:0:0)(0:0:0))
          (IOPATH I29 O (0:0:0)(0:0:0))
          (IOPATH I30 O (0:0:0)(0:0:0))
          (IOPATH I31 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_0_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_0_MC_tsimcreated_xor_Q_99)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_0_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_0_MC_D_100)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_10_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_10_MC_tsimcreated_xor_Q_103)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_10_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_10_MC_D_104)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND16")
    (INSTANCE CLK_Deb_10_MC_D1_105)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (PORT I2 (6200:6200:6200)(6200:6200:6200))
          (PORT I3 (6200:6200:6200)(6200:6200:6200))
          (PORT I4 (6200:6200:6200)(6200:6200:6200))
          (PORT I5 (6200:6200:6200)(6200:6200:6200))
          (PORT I6 (6200:6200:6200)(6200:6200:6200))
          (PORT I7 (6200:6200:6200)(6200:6200:6200))
          (PORT I8 (6200:6200:6200)(6200:6200:6200))
          (PORT I9 (6200:6200:6200)(6200:6200:6200))
          (PORT I10 (0:0:0)(0:0:0))
          (PORT I11 (0:0:0)(0:0:0))
          (PORT I12 (0:0:0)(0:0:0))
          (PORT I13 (0:0:0)(0:0:0))
          (PORT I14 (0:0:0)(0:0:0))
          (PORT I15 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
          (IOPATH I3 O (0:0:0)(0:0:0))
          (IOPATH I4 O (0:0:0)(0:0:0))
          (IOPATH I5 O (0:0:0)(0:0:0))
          (IOPATH I6 O (0:0:0)(0:0:0))
          (IOPATH I7 O (0:0:0)(0:0:0))
          (IOPATH I8 O (0:0:0)(0:0:0))
          (IOPATH I9 O (0:0:0)(0:0:0))
          (IOPATH I10 O (0:0:0)(0:0:0))
          (IOPATH I11 O (0:0:0)(0:0:0))
          (IOPATH I12 O (0:0:0)(0:0:0))
          (IOPATH I13 O (0:0:0)(0:0:0))
          (IOPATH I14 O (0:0:0)(0:0:0))
          (IOPATH I15 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_1_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_1_MC_tsimcreated_xor_Q_107)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_1_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_1_MC_D_108)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND2")
    (INSTANCE CLK_Deb_1_MC_D1_109)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_2_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_2_MC_tsimcreated_xor_Q_111)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_2_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_2_MC_D_112)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND2")
    (INSTANCE CLK_Deb_2_MC_D1_113)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_3_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_3_MC_tsimcreated_xor_Q_115)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_3_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_3_MC_D_116)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND3")
    (INSTANCE CLK_Deb_3_MC_D1_117)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (PORT I2 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_4_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_4_MC_tsimcreated_xor_Q_119)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_4_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_4_MC_D_120)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND4")
    (INSTANCE CLK_Deb_4_MC_D1_121)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (PORT I2 (6200:6200:6200)(6200:6200:6200))
          (PORT I3 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
          (IOPATH I3 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_5_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_5_MC_tsimcreated_xor_Q_123)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_5_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_5_MC_D_124)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND5")
    (INSTANCE CLK_Deb_5_MC_D1_125)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (PORT I2 (6200:6200:6200)(6200:6200:6200))
          (PORT I3 (6200:6200:6200)(6200:6200:6200))
          (PORT I4 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
          (IOPATH I3 O (0:0:0)(0:0:0))
          (IOPATH I4 O (0:0:0)(0:0:0))
        )