vesa_vga_timesim.sdf

本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證

        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_1_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_2_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_3_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_4_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_5_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_6_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE R1_7_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE VSync_59)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (3200:3200:3200)(3200:3200:3200))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE B0_0_MC_Q_60)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE B0_0_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (12000:12000:12000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE B0_0_MC_D_63)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND2")
    (INSTANCE B0_0_MC_D1_64)
      (DELAY
        (ABSOLUTE
          (PORT I0 (2500:2500:2500)(2500:2500:2500))
          (PORT I1 (2500:2500:2500)(2500:2500:2500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE ODCK1X_MC_Q_66)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE ODCK1X_MC_UIM_67)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE ODCK1X_MC_tsimcreated_xor_Q_68)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_OR2")
    (INSTANCE ODCK1X_MC_tsimcreated_prld_Q_69)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE ODCK1X_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE ODCK1X_MC_D_70)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND2")
    (INSTANCE ODCK1X_MC_D1_71)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE ODCK2X_MC_Q_73)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE ODCK2X_MC_UIM_74)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE ODCK2X_MC_tsimcreated_xor_Q_75)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_OR2")
    (INSTANCE ODCK2X_MC_tsimcreated_prld_Q_76)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE ODCK2X_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE ODCK2X_MC_D_77)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE SET_Deb_80)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE SET_Deb_MC_tsimcreated_xor_Q_81)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE SET_Deb_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE SET_Deb_MC_D_82)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND4")
    (INSTANCE SET_Deb_MC_D2_PT_0_84)
      (DELAY
        (ABSOLUTE
          (PORT I0 (7200:7200:7200)(7200:7200:7200))
          (PORT I1 (7200:7200:7200)(7200:7200:7200))
          (PORT I2 (7200:7200:7200)(7200:7200:7200))
          (PORT I3 (7200:7200:7200)(7200:7200:7200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
          (IOPATH I3 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND5")
    (INSTANCE SET_Deb_MC_D2_PT_1_85)
      (DELAY
        (ABSOLUTE
          (PORT I0 (7200:7200:7200)(7200:7200:7200))
          (PORT I1 (7200:7200:7200)(7200:7200:7200))
          (PORT I2 (7200:7200:7200)(7200:7200:7200))
          (PORT I3 (7200:7200:7200)(7200:7200:7200))
          (PORT I4 (7200:7200:7200)(7200:7200:7200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
          (IOPATH I2 O (0:0:0)(0:0:0))
          (IOPATH I3 O (0:0:0)(0:0:0))
          (IOPATH I4 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_OR2")
    (INSTANCE SET_Deb_MC_D2_86)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE SET_D0_87)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE SET_D0_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (1000:1000:1000) (500:500:500))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE SET_D0_MC_D_88)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND2")
    (INSTANCE SET_D0_MC_D1_89)
      (DELAY
        (ABSOLUTE
          (PORT I0 (2500:2500:2500)(2500:2500:2500))
          (PORT I1 (2500:2500:2500)(2500:2500:2500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE DLY_Deb_91)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE DLY_Deb_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE DLY_Deb_MC_D_92)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND2")
    (INSTANCE DLY_Deb_MC_D1_93)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_BUF")
    (INSTANCE CLK_Deb_21_Q)
      (DELAY
        (ABSOLUTE
          (IOPATH I O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_21_MC_tsimcreated_xor_Q_95)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (500:500:500)(500:500:500))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_FF")
    (INSTANCE CLK_Deb_21_MC_REG)
      (DELAY
        (ABSOLUTE
          (IOPATH CLK O (1300:1300:1300)(1300:1300:1300))
          (IOPATH SET O (2000:2000:2000)(2000:2000:2000))
          (IOPATH RST O (2000:2000:2000)(2000:2000:2000))
        )
      )
      (TIMINGCHECK
        (SETUPHOLD (posedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (negedge I) (posedge CLK) (1000:1000:1000) (500:500:500))
        (SETUPHOLD (posedge CE) (posedge CLK) (0:0:0) (0:0:0))
        (PERIOD (posedge CLK) (8000:8000:8000))
        (WIDTH (posedge SET) (0:0:0))
        (WIDTH (posedge RST) (0:0:0))
      )
  )
  (CELL (CELLTYPE "X_XOR2")
    (INSTANCE CLK_Deb_21_MC_D_96)
      (DELAY
        (ABSOLUTE
          (PORT I0 (0:0:0)(0:0:0))
          (PORT I1 (0:0:0)(0:0:0))
          (IOPATH I0 O (0:0:0)(0:0:0))
          (IOPATH I1 O (0:0:0)(0:0:0))
        )
      )
  )
  (CELL (CELLTYPE "X_AND32")
    (INSTANCE CLK_Deb_21_MC_D1_97)
      (DELAY
        (ABSOLUTE
          (PORT I0 (6200:6200:6200)(6200:6200:6200))
          (PORT I1 (6200:6200:6200)(6200:6200:6200))
          (PORT I2 (6200:6200:6200)(6200:6200:6200))
          (PORT I3 (6200:6200:6200)(6200:6200:6200))