fib.s

FPGA RSIC CPU设计文档和源码是EDA中对CPU设计非常好用的程序

; generated by lcc-gr0000 rev.3 on Fri Mar 09 21:35:21 2001

global _main
align 2
_main:
addi sp,sp,-6
sw r11,0(sp)
sw r12,2(sp)
sw r13,4(sp)
lea r11,1
lea r13,1
lea r12,1
br L4
L3:
mov r12,r11
add r12,r13
mov r11,r13
mov r13,r12
L4:
rcmpi r12,10000
bge L3
mov r2,r11
L2:
lw r11,0(sp)
lw r12,2(sp)
lw r13,4(sp)
addi sp,sp,6
ret