scankey_4_4.v

运用TLC5510A高速(20M),扫描出波形,测量相位差,两个TLC5510A测两个波形.

module ScanKey_4_4(CS,RD,CLK,Dout,KC,KR,INT);
//This module scans the 4*4 keyboard,and returns the key value by the Dout port.
//e.g. we press the 4th key,the Dout port will output 8'b0000100,
//     and the INT port will be low,and can generate a interrupt. 

input CLK;       //Clock signal of the module
input CS;
input RD;
inout [3:0] KC;  //Columns of 4X4 KeyBoard
inout [3:0] KR;  //Rows of 4X4 KeyBoard
output [7:0] Dout;  //Output the numeber of the key 
output INT;      //Interrupt signal 

reg[3:0] KC_temp;
reg[3:0] KR_temp;

reg[3:0] KC_out;
reg[3:0] KR_out; 

reg[7:0] Key_temp;
 
reg[2:0] Count;  //Couter for scanning keyboard

assign KC=(Count==0)? 4'bzzzz:KC_out;
assign KR=(Count==3)? 4'bzzzz:KR_out;
assign INT=(Key_temp>15)? 1:0;            //Generate Interrupt Signal
assign Dout=((!CS)&(!RD))? Key_temp : 8'hzz;//If the system has no bus connect module,use this for keydata output 
//assign Dout=Key_temp;                   //If the system has a bus connect module,use this for keydata output 



always@(posedge CLK)                  //Status Counter for Scanning machine
  begin
    Count<=Count+1;
  end

always@(posedge CLK)                  //Scanning part
  begin
    if(Count==6)
       begin
         KC_out<=4'b1111;
         KR_out<=4'b0000;
       end
    if(Count==0)
         KC_temp<=KC;
    if(Count==1)
       begin
         KC_out<=4'b0000;
         KR_out<=4'b1111;
       end
    if(Count==3)
         KR_temp<=KR;
  end  

always@(posedge CLK)                     
  begin
    case({KC_temp,KR_temp})
      8'b11101110:Key_temp<=0;
      8'b11101101:Key_temp<=1;
      8'b11101011:Key_temp<=2;
      8'b11100111:Key_temp<=3;
      8'b11011110:Key_temp<=4;
      8'b11011101:Key_temp<=5;
      8'b11011011:Key_temp<=6;
      8'b11010111:Key_temp<=7;
      8'b10111110:Key_temp<=8;
      8'b10111101:Key_temp<=9;
      8'b10111011:Key_temp<=10;
      8'b10110111:Key_temp<=11;
      8'b01111110:Key_temp<=12;
      8'b01111101:Key_temp<=13;
      8'b01111011:Key_temp<=14;
      8'b01110111:Key_temp<=15; 
     default:Key_temp<=31;
    endcase
  end
endmodule