core_1c6.map.rpt

运用TLC5510A高速(20M),扫描出波形,测量相位差,两个TLC5510A测两个波形.

; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 89    ;
; Number of registers using Synchronous Clear  ; 44    ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 0     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 36    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                     ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output           ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------+
; 3:1                ; 19 bits   ; 38 LEs        ; 19 LEs               ; 19 LEs                 ; Yes        ; |core_1c6|add18:inst47|SUM[0]        ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |core_1c6|add18:inst47|DATA[7]       ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; No         ; |core_1c6|select2_1:inst31|out_q[7]  ;
; 7:1                ; 8 bits    ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; No         ; |core_1c6|BUS_Connect:inst9|Select~0 ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------+


+----------------------------------------------------------------------------------------------------+
; Source assignments for RAM_1K:inst5|altsyncram:altsyncram_component|altsyncram_aqb1:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------+
; Assignment                      ; Value              ; from ; to                                   ;
+---------------------------------+--------------------+------+--------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                    ;
+---------------------------------+--------------------+------+--------------------------------------+


+-----------------------------------------------------------------------------------------------------+
; Source assignments for RAM_1K:inst17|altsyncram:altsyncram_component|altsyncram_aqb1:auto_generated ;
+---------------------------------+--------------------+------+---------------------------------------+
; Assignment                      ; Value              ; from ; to                                    ;
+---------------------------------+--------------------+------+---------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                     ;
+---------------------------------+--------------------+------+---------------------------------------+


+------------------------------------------------------------------------------------------------+
; Source assignments for ScanKey:inst15|altsyncram:reduce_or_rtl_0|altsyncram_r9l:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------+
; Assignment                      ; Value              ; from ; to                               ;
+---------------------------------+--------------------+------+----------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                ;
+---------------------------------+--------------------+------+----------------------------------+


+-------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: RAM_1K:inst5|altsyncram:altsyncram_component ;
+------------------------------------+-----------------+------------------------------------+
; Parameter Name                     ; Value           ; Type                               ;
+------------------------------------+-----------------+------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8               ; Untyped                            ;
; AUTO_CARRY_CHAINS                  ; ON              ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS               ; OFF             ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS                ; ON              ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF             ; IGNORE_CASCADE                     ;
; OPERATION_MODE                     ; DUAL_PORT       ; Untyped                            ;
; WIDTH_A                            ; 8               ; Integer                            ;
; WIDTHAD_A                          ; 10              ; Integer                            ;
; NUMWORDS_A                         ; 1024            ; Integer                            ;
; OUTDATA_REG_A                      ; UNREGISTERED    ; Untyped                            ;
; ADDRESS_ACLR_A                     ; NONE            ; Untyped                            ;
; OUTDATA_ACLR_A                     ; NONE            ; Untyped                            ;
; WRCONTROL_ACLR_A                   ; NONE            ; Untyped                            ;
; INDATA_ACLR_A                      ; NONE            ; Untyped                            ;
; BYTEENA_ACLR_A                     ; NONE            ; Untyped                            ;
; WIDTH_B                            ; 8               ; Integer                            ;
; WIDTHAD_B                          ; 10              ; Integer                            ;
; NUMWORDS_B                         ; 1024            ; Integer                            ;
; INDATA_REG_B                       ; CLOCK1          ; Untyped                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1          ; Untyped                            ;
; RDCONTROL_REG_B                    ; CLOCK1          ; Untyped                            ;
; ADDRESS_REG_B                      ; CLOCK1          ; Untyped                            ;
; OUTDATA_REG_B                      ; CLOCK1          ; Untyped                            ;
; BYTEENA_REG_B                      ; CLOCK1          ; Untyped                            ;
; INDATA_ACLR_B                      ; NONE            ; Untyped                            ;
; WRCONTROL_ACLR_B                   ; NONE            ; Untyped                            ;
; ADDRESS_ACLR_B                     ; NONE            ; Untyped                            ;
; OUTDATA_ACLR_B                     ; NONE            ; Untyped                            ;
; RDCONTROL_ACLR_B                   ; NONE            ; Untyped                            ;
; BYTEENA_ACLR_B                     ; NONE            ; Untyped                            ;
; WIDTH_BYTEENA_A                    ; 1               ; Integer                            ;
; WIDTH_BYTEENA_B                    ; 1               ; Untyped                            ;
; RAM_BLOCK_TYPE                     ; AUTO            ; Untyped                            ;
; BYTE_SIZE                          ; 8               ; Untyped                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE       ; Untyped                            ;
; INIT_FILE                          ; UNUSED          ; Untyped                            ;
; INIT_FILE_LAYOUT                   ; PORT_A          ; Untyped                            ;
; MAXIMUM_DEPTH                      ; 0               ; Untyped                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL          ; Untyped                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL          ; Untyped                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL          ; Untyped                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL          ; Untyped                            ;
; DEVICE_FAMILY                      ; Cyclone         ; Untyped                            ;
; CBXI_PARAMETER                     ; altsyncram_aqb1 ; Untyped                            ;
+------------------------------------+-----------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: RAM_1K:inst17|altsyncram:altsyncram_component ;
+------------------------------------+-----------------+-------------------------------------+
; Parameter Name                     ; Value           ; Type                                ;
+------------------------------------+-----------------+-------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8               ; Untyped                             ;
; AUTO_CARRY_CHAINS                  ; ON              ; AUTO_CARRY                          ;
; IGNORE_CARRY_BUFFERS               ; OFF             ; IGNORE_CARRY                        ;
; AUTO_CASCADE_CHAINS                ; ON              ; AUTO_CASCADE                        ;
; IGNORE_CASCADE_BUFFERS             ; OFF             ; IGNORE_CASCADE                      ;
; OPERATION_MODE                     ; DUAL_PORT       ; Untyped                             ;
; WIDTH_A                            ; 8               ; Integer                             ;
; WIDTHAD_A                          ; 10              ; Integer                             ;
; NUMWORDS_A                         ; 1024            ; Integer                             ;
; OUTDATA_REG_A                      ; UNREGISTERED    ; Untyped                             ;
; ADDRESS_ACLR_A                     ; NONE            ; Untyped                             ;
; OUTDATA_ACLR_A                     ; NONE            ; Untyped                             ;
; WRCONTROL_ACLR_A                   ; NONE            ; Untyped                             ;
; INDATA_ACLR_A                      ; NONE            ; Untyped                             ;
; BYTEENA_ACLR_A                     ; NONE            ; Untyped                             ;
; WIDTH_B                            ; 8               ; Integer                             ;
; WIDTHAD_B                          ; 10              ; Integer                             ;
; NUMWORDS_B                         ; 1024            ; Integer                             ;
; INDATA_REG_B                       ; CLOCK1          ; Untyped                             ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1          ; Untyped                             ;
; RDCONTROL_REG_B                    ; CLOCK1          ; Untyped                             ;