uart.gdf

FPGA-UART异步通信串行口设计实例

	)
	(port
		(pt 48 16)
		(output)
		(text "OUT" (rect 32 7 47 19)(font "Courier New" (bold))(invisible))
		(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
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		(line (pt 13 25)(pt 31 16)(line_width 1))
		(circle (rect 31 12 39 20)(line_width 1))
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	(rect 200 64 424 528)
	(text "UARTCTRL" (rect 5 0 62 12)(font "Arial" ))
	(text "inst3" (rect 8 256 31 268)(font "Arial" ))
	(port
		(pt 0 296)
		(input)
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		(text "Di[7..0]" (rect 21 288 57 300)(font "Arial" ))
		(line (pt 0 296)(pt 16 296)(line_width 3))
	)
	(port
		(pt 0 416)
		(input)
		(text "CLK" (rect 0 0 21 12)(font "Arial" ))
		(text "CLK" (rect 21 408 42 420)(font "Arial" ))
		(line (pt 0 416)(pt 16 416)(line_width 1))
	)
	(port
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		(input)
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		(text "RESET" (rect 21 160 56 172)(font "Arial" ))
		(line (pt 0 168)(pt 16 168)(line_width 1))
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		(text "CS" (rect 21 144 36 156)(font "Arial" ))
		(line (pt 0 152)(pt 16 152)(line_width 1))
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		(text "A[1..0]" (rect 21 96 54 108)(font "Arial" ))
		(line (pt 0 104)(pt 16 104)(line_width 3))
	)
	(port
		(pt 224 72)
		(input)
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		(text "TxSTATUS" (rect 147 64 200 76)(font "Arial" ))
		(line (pt 208 72)(pt 224 72)(line_width 1))
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		(input)
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		(text "TxEnd" (rect 170 112 200 124)(font "Arial" ))
		(line (pt 208 120)(pt 224 120)(line_width 1))
	)
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		(text "RxSTATUS[4..0]" (rect 119 304 200 316)(font "Arial" ))
		(line (pt 208 312)(pt 224 312)(line_width 3))
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		(text "RxReg[7..0]" (rect 140 320 200 332)(font "Arial" ))
		(line (pt 208 328)(pt 224 328)(line_width 3))
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		(text "RxEnd" (rect 166 352 199 364)(font "Arial" ))
		(line (pt 208 360)(pt 224 360)(line_width 1))
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		(text "INT" (rect 24 32 41 44)(font "Arial" ))
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		(text "RCVD" (rect 24 48 55 60)(font "Arial" ))
		(line (pt 16 56)(pt 0 56)(line_width 1))
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		(output)
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		(text "TxDIVISOR[16..0]" (rect 114 35 203 47)(font "Arial" ))
		(line (pt 224 40)(pt 208 40)(line_width 3))
	)
	(port
		(pt 224 56)
		(output)
		(text "TxCfgReg[6..0]" (rect 0 0 76 12)(font "Arial" ))
		(text "TxCfgReg[6..0]" (rect 127 51 203 63)(font "Arial" ))
		(line (pt 224 56)(pt 208 56)(line_width 3))
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		(output)
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		(line (pt 224 88)(pt 208 88)(line_width 3))
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	(port
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		(output)
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		(text "TxStart" (rect 168 99 203 111)(font "Arial" ))
		(line (pt 224 104)(pt 208 104)(line_width 1))
	)
	(port
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		(output)
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		(text "TxReset" (rect 162 131 203 143)(font "Arial" ))
		(line (pt 224 136)(pt 208 136)(line_width 1))
	)
	(port
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		(output)
		(text "TxCLK" (rect 0 0 33 12)(font "Arial" ))
		(text "TxCLK" (rect 170 147 203 159)(font "Arial" ))
		(line (pt 224 152)(pt 208 152)(line_width 1))
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	(port
		(pt 224 280)
		(output)
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		(text "RxDIVISOR[16..0]" (rect 104 272 196 284)(font "Arial" ))
		(line (pt 224 280)(pt 208 280)(line_width 3))
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		(output)
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		(line (pt 224 296)(pt 208 296)(line_width 3))
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		(output)
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		(text "RxStart" (rect 158 336 195 348)(font "Arial" ))
		(line (pt 224 344)(pt 208 344)(line_width 1))
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	(port
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		(output)
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		(text "RxReset" (rect 152 368 195 380)(font "Arial" ))
		(line (pt 224 376)(pt 208 376)(line_width 1))
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		(output)
		(text "RxCLK" (rect 0 0 35 12)(font "Arial" ))
		(text "RxCLK" (rect 161 384 196 396)(font "Arial" ))
		(line (pt 224 392)(pt 208 392)(line_width 1))
	)
	(parameter
		"FCLK"
		"1000000"
		""
	)
	(parameter
		"CONFIG"
		"48"
		""
	)
	(parameter
		"BAUDRATE"
		"7"
		""
	)
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	)
	(annotation_block (parameter)(rect 200 8 312 64))
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	(pt 200 200)
	(pt 96 200)
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