chirp_uwb_css_analog_dss.mdl

超宽带matlab仿真

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      Position		      [480, 250, 520, 310]
      TreatAsAtomicUnit	      off
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      System {
	Name			"dchirp"
	Location		[2, 74, 1014, 724]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
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	PaperUnits		"centimeters"
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	Block {
	  BlockType		  Inport
	  Name			  "In1"
	  Position		  [180, 133, 210, 147]
	  Port			  "1"
	  IconDisplay		  "Port number"
	  LatchInput		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "Chirp Signal"
	  Ports			  [0, 1]
	  Position		  [185, 185, 215, 215]
	  SourceBlock		  "simulink/Sources/Chirp Signal"
	  SourceType		  "chirp"
	  ShowPortLabels	  on
	  f1			  "0"
	  T			  "ta_time"
	  f2			  "ta_fre"
	  VectorParams1D	  on
	}
	Block {
	  BlockType		  DiscreteIntegrator
	  Name			  "Discrete-Time\nIntegrator1"
	  Ports			  [2, 1]
	  Position		  [325, 138, 365, 187]
	  IntegratorMethod	  "Integration: Forward Euler"
	  gainval		  "1e6"
	  ExternalReset		  "level"
	  InitialConditionSource  "internal"
	  SampleTime		  "Ts_chirp"
	  IgnoreLimit		  off
	  ICPrevOutput		  "DiscIntNeverNeededParam"
	  ICPrevScaledInput	  "DiscIntNeverNeededParam"
	}
	Block {
	  BlockType		  Product
	  Name			  "Product"
	  Ports			  [2, 1]
	  Position		  [235, 132, 265, 163]
	  InputSameDT		  off
	  OutDataTypeMode	  "Inherit via internal rule"
	  SaturateOnIntegerOverflow off
	  SampleTime		  "Ts_chirp"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sample\nand Hold"
	  Ports			  [1, 1, 0, 1]
	  Position		  [395, 144, 445, 186]
	  SourceBlock		  "dspsigops/Sample\nand Hold"
	  SourceType		  "Sample and Hold"
	  ShowPortLabels	  on
	  trig			  "Falling edge"
	  initCond		  "0"
	  latchinput		  off
	}
	Block {
	  BlockType		  Signum
	  Name			  "Sign"
	  Position		  [495, 150, 525, 180]
	  SampleTime		  "Ts"
	}
	Block {
	  BlockType		  DiscretePulseGenerator
	  Name			  "clock3"
	  Ports			  [0, 1]
	  Position		  [205, 73, 250, 107]
	  PulseType		  "Time based"
	  Period		  "Ts"
	  SampleTime		  "0.5e-9"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [585, 158, 615, 172]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Chirp Signal"
	  SrcPort		  1
	  DstBlock		  "Product"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Product"
	  SrcPort		  1
	  DstBlock		  "Discrete-Time\nIntegrator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "clock3"
	  SrcPort		  1
	  Points		  [50, 0; 0, 25]
	  Branch {
	    Points		    [0, 60]
	    DstBlock		    "Discrete-Time\nIntegrator1"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [115, 0]
	    DstBlock		    "Sample\nand Hold"
	    DstPort		    trigger
	  }
	}
	Line {
	  SrcBlock		  "Discrete-Time\nIntegrator1"
	  SrcPort		  1
	  DstBlock		  "Sample\nand Hold"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "Product"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sample\nand Hold"
	  SrcPort		  1
	  DstBlock		  "Sign"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sign"
	  SrcPort		  1
	  DstBlock		  "Out1"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "map0->1"
      Ports		      [1, 1]
      Position		      [145, 250, 185, 310]
      TreatAsAtomicUnit	      off
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      System {
	Name			"map0->1"
	Location		[427, 329, 807, 436]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "In1"
	  Position		  [70, 63, 100, 77]
	  Port			  "1"
	  IconDisplay		  "Port number"
	  LatchInput		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant1"
	  Position		  [25, 25, 55, 55]
	  Value			  "0.5"
	}
	Block {
	  BlockType		  Gain
	  Name			  "Gain"
	  Position		  [270, 50, 300, 80]
	  Gain			  "2"
	  ParameterDataTypeMode	  "Inherit via internal rule"
	  OutDataTypeMode	  "Inherit via internal rule"
	  SaturateOnIntegerOverflow off
	}
	Block {
	  BlockType		  Sum
	  Name			  "Subtract"
	  Ports			  [2, 1]
	  Position		  [155, 47, 185, 78]
	  Inputs		  "+-"
	  InputSameDT		  off
	  OutDataTypeMode	  "Inherit via internal rule"
	  OutScaling		  "2^-10"
	  SaturateOnIntegerOverflow off
	  SampleTime		  "Ts"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [325, 58, 355, 72]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Subtract"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Subtract"
	  SrcPort		  1
	  DstBlock		  "Gain"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gain"
	  SrcPort		  1
	  DstBlock		  "Out1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "Subtract"
	  DstPort		  2
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      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "map1->0"
      Ports		      [1, 1]
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      TreatAsAtomicUnit	      off
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      System {
	Name			"map1->0"
	Location		[427, 329, 807, 452]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "In1"
	  Position		  [25, 78, 55, 92]
	  Port			  "1"
	  IconDisplay		  "Port number"
	  LatchInput		  off
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant1"
	  Position		  [25, 25, 55, 55]
	  Value			  "0.5"
	}
	Block {
	  BlockType		  Gain
	  Name			  "Gain1"
	  Position		  [90, 69, 130, 101]
	  Gain			  "-0.5"
	  ParameterDataTypeMode	  "Inherit via internal rule"
	  OutDataTypeMode	  "Inherit via internal rule"
	  SaturateOnIntegerOverflow off
	}
	Block {
	  BlockType		  Sum
	  Name			  "Subtract"
	  Ports			  [2, 1]
	  Position		  [180, 47, 210, 78]
	  InputSameDT		  off
	  OutDataTypeMode	  "Inherit via internal rule"
	  OutScaling		  "2^-10"
	  SaturateOnIntegerOverflow off
	  SampleTime		  "Ts"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [250, 58, 280, 72]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "Gain1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Subtract"
	  SrcPort		  1
	  DstBlock		  "Out1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  Points		  [25, 0; 0, 15]
	  DstBlock		  "Subtract"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gain1"
	  SrcPort		  1
	  Points		  [0, -15]
	  DstBlock		  "Subtract"
	  DstPort		  2
	}
      }
    }
    Line {
      SrcBlock		      "Bernoulli Binary\nGenerator"
      SrcPort		      1
      Points		      [0, 5; 15, 0]
      Branch {
	Points			[10, 0]
	DstBlock		"map0->1"
	DstPort			1
      }
      Branch {
	Points			[0, -110; 460, 0; 0, 35]
	DstBlock		"Error Rate\nCalculation"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "chirp"
      SrcPort		      1
      DstBlock		      "Gain"
      DstPort		      1
    }
    Line {
      SrcBlock		      "dchirp"
      SrcPort		      1
      DstBlock		      "map1->0"
      DstPort		      1
    }
    Line {
      SrcBlock		      "map0->1"
      SrcPort		      1
      Points		      [15, 0]
      DstBlock		      "chirp"
      DstPort		      1
    }
    Line {
      SrcBlock		      "map1->0"
      SrcPort		      1
      Points		      [0, -20; 35, 0]
      DstBlock		      "Error Rate\nCalculation"
      DstPort		      2
    }
    Line {
      SrcBlock		      "AWGN\nChannel"
      SrcPort		      1
      DstBlock		      "dchirp"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Gain"
      SrcPort		      1
      DstBlock		      "AWGN\nChannel"
      DstPort		      1
    }
  }
}