dds.map.rpt

来自「verilog编写基于fpga的DDS实现」· RPT 代码 · 共 524 行 · 第 1/5 页

+----------------------+-------+------+-------------------------------+
; Assignment           ; Value ; From ; To                            ;
+----------------------+-------+------+-------------------------------+
; AUTO_ROM_RECOGNITION ; OFF   ; -    ; -                             ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[0]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[1]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[2]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[3]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[4]               ;
+----------------------+-------+------+-------------------------------+


+-----------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mux4:inst3|lpm_mux:lpm_mux_component ;
+------------------------+---------+------------------------------------------------+
; Parameter Name         ; Value   ; Type                                           ;
+------------------------+---------+------------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                     ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                   ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                   ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                 ;
; LPM_WIDTH              ; 12      ; Untyped                                        ;
; LPM_SIZE               ; 4       ; Untyped                                        ;
; LPM_WIDTHS             ; 2       ; Untyped                                        ;
; LPM_PIPELINE           ; 0       ; Untyped                                        ;
; CBXI_PARAMETER         ; mux_ogc ; Untyped                                        ;
; DEVICE_FAMILY          ; Cyclone ; Untyped                                        ;
+------------------------+---------+------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: ram:inst7|altsyncram:altsyncram_component ;
+------------------------------------+-----------------+---------------------------------+
; Parameter Name                     ; Value           ; Type                            ;
+------------------------------------+-----------------+---------------------------------+
; BYTE_SIZE_BLOCK                    ; 8               ; Untyped                         ;
; AUTO_CARRY_CHAINS                  ; ON              ; AUTO_CARRY                      ;
; IGNORE_CARRY_BUFFERS               ; OFF             ; IGNORE_CARRY                    ;
; AUTO_CASCADE_CHAINS                ; ON              ; AUTO_CASCADE                    ;
; IGNORE_CASCADE_BUFFERS             ; OFF             ; IGNORE_CASCADE                  ;
; OPERATION_MODE                     ; DUAL_PORT       ; Untyped                         ;
; WIDTH_A                            ; 16              ; Untyped                         ;
; WIDTHAD_A                          ; 9               ; Untyped                         ;
; NUMWORDS_A                         ; 512             ; Untyped                         ;
; OUTDATA_REG_A                      ; UNREGISTERED    ; Untyped                         ;
; ADDRESS_ACLR_A                     ; NONE            ; Untyped                         ;
; OUTDATA_ACLR_A                     ; NONE            ; Untyped                         ;
; WRCONTROL_ACLR_A                   ; NONE            ; Untyped                         ;
; INDATA_ACLR_A                      ; NONE            ; Untyped                         ;
; BYTEENA_ACLR_A                     ; NONE            ; Untyped                         ;
; WIDTH_B                            ; 16              ; Untyped                         ;
; WIDTHAD_B                          ; 9               ; Untyped                         ;
; NUMWORDS_B                         ; 512             ; Untyped                         ;
; INDATA_REG_B                       ; CLOCK1          ; Untyped                         ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1          ; Untyped                         ;
; RDCONTROL_REG_B                    ; CLOCK1          ; Untyped                         ;
; ADDRESS_REG_B                      ; CLOCK1          ; Untyped                         ;
; OUTDATA_REG_B                      ; CLOCK1          ; Untyped                         ;
; BYTEENA_REG_B                      ; CLOCK1          ; Untyped                         ;
; INDATA_ACLR_B                      ; NONE            ; Untyped                         ;
; WRCONTROL_ACLR_B                   ; NONE            ; Untyped                         ;
; ADDRESS_ACLR_B                     ; NONE            ; Untyped                         ;
; OUTDATA_ACLR_B                     ; NONE            ; Untyped                         ;
; RDCONTROL_ACLR_B                   ; NONE            ; Untyped                         ;
; BYTEENA_ACLR_B                     ; NONE            ; Untyped                         ;
; WIDTH_BYTEENA_A                    ; 1               ; Untyped                         ;
; WIDTH_BYTEENA_B                    ; 1               ; Untyped                         ;
; RAM_BLOCK_TYPE                     ; AUTO            ; Untyped                         ;
; BYTE_SIZE                          ; 8               ; Untyped                         ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE       ; Untyped                         ;
; INIT_FILE                          ; UNUSED          ; Untyped                         ;
; INIT_FILE_LAYOUT                   ; PORT_A          ; Untyped                         ;
; MAXIMUM_DEPTH                      ; 0               ; Untyped                         ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL          ; Untyped                         ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL          ; Untyped                         ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL          ; Untyped                         ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL          ; Untyped                         ;
; DEVICE_FAMILY                      ; Cyclone         ; Untyped                         ;
; CBXI_PARAMETER                     ; altsyncram_vpl1 ; Untyped                         ;
+------------------------------------+-----------------+---------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: square:inst2|altsyncram:altsyncram_component ;
+------------------------------------+-----------------+------------------------------------+
; Parameter Name                     ; Value           ; Type                               ;
+------------------------------------+-----------------+------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8               ; Untyped                            ;
; AUTO_CARRY_CHAINS                  ; ON              ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS               ; OFF             ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS                ; ON              ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF             ; IGNORE_CASCADE                     ;
; OPERATION_MODE                     ; ROM             ; Untyped                            ;
; WIDTH_A                            ; 12              ; Untyped                            ;
; WIDTHAD_A                          ; 12              ; Untyped                            ;
; NUMWORDS_A                         ; 4096            ; Untyped                            ;
; OUTDATA_REG_A                      ; CLOCK0          ; Untyped                            ;
; ADDRESS_ACLR_A                     ; NONE            ; Untyped                            ;
; OUTDATA_ACLR_A                     ; NONE            ; Untyped                            ;
; WRCONTROL_ACLR_A                   ; NONE            ; Untyped                            ;
; INDATA_ACLR_A                      ; NONE            ; Untyped                            ;
; BYTEENA_ACLR_A