main.map.eqn

基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码

--H1L33 is disp_data_mux:inst8|Data~1513
--operation mode is normal

H1L33 = D1_Alarmclock_EN & H1L23 & !H1L16 & !J1_alarmclock_disp_select[1];


--J1_alarmclock_disp_select[0] is alarmclock:inst11|alarmclock_disp_select[0]
--operation mode is normal

J1_alarmclock_disp_select[0]_lut_out = J1L6;
J1_alarmclock_disp_select[0] = DFFEAS(J1_alarmclock_disp_select[0]_lut_out, F1_f200hz, VCC, , , , , , );


--J1_alarmclock_disp_select[3] is alarmclock:inst11|alarmclock_disp_select[3]
--operation mode is normal

J1_alarmclock_disp_select[3]_lut_out = J1L3;
J1_alarmclock_disp_select[3] = DFFEAS(J1_alarmclock_disp_select[3]_lut_out, F1_f200hz, VCC, , , , , , );


--J1_alarmclock_disp_select[2] is alarmclock:inst11|alarmclock_disp_select[2]
--operation mode is normal

J1_alarmclock_disp_select[2]_lut_out = J1L4;
J1_alarmclock_disp_select[2] = DFFEAS(J1_alarmclock_disp_select[2]_lut_out, F1_f200hz, VCC, , , , , , );


--H1L43 is disp_data_mux:inst8|Data~1514
--operation mode is normal

H1L43 = H1L33 & J1_alarmclock_disp_select[0] & !J1_alarmclock_disp_select[3] & !J1_alarmclock_disp_select[2];


--G1_time_disp_select[5] is time_disp_select:inst6|time_disp_select[5]
--operation mode is normal

G1_time_disp_select[5]_lut_out = !G1_disp_drive[0] & !G1_disp_drive[2] & !G1_disp_drive[1];
G1_time_disp_select[5] = DFFEAS(G1_time_disp_select[5]_lut_out, G1_clk, VCC, , , , , , );


--G1_time_disp_select[3] is time_disp_select:inst6|time_disp_select[3]
--operation mode is normal

G1_time_disp_select[3]_lut_out = G1_disp_drive[1] & !G1_disp_drive[0] & !G1_disp_drive[2];
G1_time_disp_select[3] = DFFEAS(G1_time_disp_select[3]_lut_out, G1_clk, VCC, , , , , , );


--G1_time_disp_select[2] is time_disp_select:inst6|time_disp_select[2]
--operation mode is normal

G1_time_disp_select[2]_lut_out = G1_disp_drive[0] & G1_disp_drive[1] & !G1_disp_drive[2];
G1_time_disp_select[2] = DFFEAS(G1_time_disp_select[2]_lut_out, G1_clk, VCC, , , , , , );


--H1L53 is disp_data_mux:inst8|Data~1515
--operation mode is normal

H1L53 = H1L16 & !G1_time_disp_select[5] & !G1_time_disp_select[3] & !G1_time_disp_select[2];


--G1_time_disp_select[0] is time_disp_select:inst6|time_disp_select[0]
--operation mode is normal

G1_time_disp_select[0]_lut_out = G1_disp_drive[0] & G1_disp_drive[2] & !G1_disp_drive[1];
G1_time_disp_select[0] = DFFEAS(G1_time_disp_select[0]_lut_out, G1_clk, VCC, , , , , , );


--G1_time_disp_select[4] is time_disp_select:inst6|time_disp_select[4]
--operation mode is normal

G1_time_disp_select[4]_lut_out = G1_disp_drive[0] & !G1_disp_drive[2] & !G1_disp_drive[1];
G1_time_disp_select[4] = DFFEAS(G1_time_disp_select[4]_lut_out, G1_clk, VCC, , , , , , );


--H1L63 is disp_data_mux:inst8|Data~1516
--operation mode is normal

H1L63 = G1_time_disp_select[0] & !G1_time_disp_select[4];


--G1_time_disp_select[1] is time_disp_select:inst6|time_disp_select[1]
--operation mode is normal

G1_time_disp_select[1]_lut_out = G1_disp_drive[2] & !G1_disp_drive[0] & !G1_disp_drive[1];
G1_time_disp_select[1] = DFFEAS(G1_time_disp_select[1]_lut_out, G1_clk, VCC, , , , , , );


--H1L73 is disp_data_mux:inst8|Data~1517
--operation mode is normal

H1L73 = H1L43 # H1L53 & H1L63 & !G1_time_disp_select[1];


--H1L83 is disp_data_mux:inst8|Data~1518
--operation mode is normal

H1L83 = G1_time_disp_select[1] & H1L53 & !G1_time_disp_select[4] & !G1_time_disp_select[0];


--H1L93 is disp_data_mux:inst8|Data~1519
--operation mode is normal

H1L93 = D1_Alarmclock_EN & !H1L16 & !J1_alarmclock_disp_select[5] & !J1_alarmclock_disp_select[4];


--H1L04 is disp_data_mux:inst8|Data~1520
--operation mode is normal

H1L04 = !J1_alarmclock_disp_select[3] & !J1_alarmclock_disp_select[2] & !J1_alarmclock_disp_select[0];


--H1L14 is disp_data_mux:inst8|Data~1521
--operation mode is normal

H1L14 = H1L83 # J1_alarmclock_disp_select[1] & H1L93 & H1L04;


--H1L41 is disp_data_mux:inst8|Data~386
--operation mode is normal

H1L41 = H1L73 # H1L14;


--H1L24 is disp_data_mux:inst8|Data~1522
--operation mode is normal

H1L24 = H1L16 & !G1_time_disp_select[5] & !G1_time_disp_select[4] & !G1_time_disp_select[0];


--H1L34 is disp_data_mux:inst8|Data~1523
--operation mode is normal

H1L34 = G1_time_disp_select[2] & H1L24 & !G1_time_disp_select[1] & !G1_time_disp_select[3];


--H1L44 is disp_data_mux:inst8|Data~1524
--operation mode is normal

H1L44 = H1L33 & J1_alarmclock_disp_select[2] & !J1_alarmclock_disp_select[3] & !J1_alarmclock_disp_select[0];


--H1L54 is disp_data_mux:inst8|Data~1525
--operation mode is normal

H1L54 = H1L73 # !H1L14 & H1L34 # H1L44;


--U1_day0[0] is date_main:inst4|datecontrol:b2v_inst1|day0[0]
--operation mode is normal

U1_day0[0]_lut_out = D1_Date_EN & T1_EO1 & S31_safe_q[0] # !T1_EO1 & S61_safe_q[0] # !D1_Date_EN & S61_safe_q[0];
U1_day0[0] = DFFEAS(U1_day0[0]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--U1_disp_select[4] is date_main:inst4|datecontrol:b2v_inst1|disp_select[4]
--operation mode is normal

U1_disp_select[4]_lut_out = V1_disp_drive[0] & !V1_disp_drive[1] & !T1_EO1 # !D1_Date_EN;
U1_disp_select[4] = DFFEAS(U1_disp_select[4]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--U1_disp_select[2] is date_main:inst4|datecontrol:b2v_inst1|disp_select[2]
--operation mode is normal

U1_disp_select[2]_lut_out = D1_Date_EN & T1_EO1 # V1_disp_drive[1] & V1_disp_drive[0] # !D1_Date_EN & V1_disp_drive[1] & V1_disp_drive[0];
U1_disp_select[2] = DFFEAS(U1_disp_select[2]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--U1_disp_select[5] is date_main:inst4|datecontrol:b2v_inst1|disp_select[5]
--operation mode is normal

U1_disp_select[5]_lut_out = !V1_disp_drive[1] & !V1_disp_drive[0] & !T1_EO1 # !D1_Date_EN;
U1_disp_select[5] = DFFEAS(U1_disp_select[5]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--U1_disp_select[3] is date_main:inst4|datecontrol:b2v_inst1|disp_select[3]
--operation mode is normal

U1_disp_select[3]_lut_out = V1_disp_drive[1] & !V1_disp_drive[0] & !T1_EO1 # !D1_Date_EN;
U1_disp_select[3] = DFFEAS(U1_disp_select[3]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--H1L64 is disp_data_mux:inst8|Data~1526
--operation mode is normal

H1L64 = !U1_disp_select[5] & !U1_disp_select[3] & U1_disp_select[4] $ U1_disp_select[2];


--U1_month1[0] is date_main:inst4|datecontrol:b2v_inst1|month1[0]
--operation mode is normal

U1_month1[0]_lut_out = D1_Date_EN & T1_EO1 & T1_month1[0] # !T1_EO1 & S91_safe_q[0] # !D1_Date_EN & S91_safe_q[0];
U1_month1[0] = DFFEAS(U1_month1[0]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--H1L74 is disp_data_mux:inst8|Data~1527
--operation mode is normal

H1L74 = U1_disp_select[5] # U1_disp_select[4] # U1_disp_select[3] $ !U1_disp_select[2];


--U1_day1[0] is date_main:inst4|datecontrol:b2v_inst1|day1[0]
--operation mode is normal

U1_day1[0]_lut_out = D1_Date_EN & T1_EO1 & S41_safe_q[0] # !T1_EO1 & S71_safe_q[0] # !D1_Date_EN & S71_safe_q[0];
U1_day1[0] = DFFEAS(U1_day1[0]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--H1L61 is disp_data_mux:inst8|Data~403
--operation mode is normal

H1L61 = H1L64 & H1L74 # !H1L64 & H1L74 & U1_month1[0] # !H1L74 & U1_day1[0];


--U1_month0[0] is date_main:inst4|datecontrol:b2v_inst1|month0[0]
--operation mode is normal

U1_month0[0]_lut_out = D1_Date_EN & T1_EO1 & S51_safe_q[0] # !T1_EO1 & S81_safe_q[0] # !D1_Date_EN & S81_safe_q[0];
U1_month0[0] = DFFEAS(U1_month0[0]_lut_out, F1_f200hz, VCC, , U1L81, , , , );


--H1L71 is disp_data_mux:inst8|Data~404
--operation mode is normal

H1L71 = H1L64 & H1L61 & U1_month0[0] # !H1L61 & U1_day0[0] # !H1L64 & H1L61;


--H1L84 is disp_data_mux:inst8|Data~1528
--operation mode is normal

H1L84 = H1L16 & !G1_time_disp_select[4] & !G1_time_disp_select[0];


--H1L94 is disp_data_mux:inst8|Data~1529
--operation mode is normal

H1L94 = !G1_time_disp_select[1] & !G1_time_disp_select[2];


--H1L05 is disp_data_mux:inst8|Data~1530
--operation mode is normal

H1L05 = G1_time_disp_select[5] & H1L84 & H1L94 & !G1_time_disp_select[3];


--H1L15 is disp_data_mux:inst8|Data~1531
--operation mode is normal

H1L15 = D1_Alarmclock_EN & H1L04 & !H1L16 & !J1_alarmclock_disp_select[1];


--H1L25 is disp_data_mux:inst8|Data~1532
--operation mode is normal

H1L25 = H1L05 # J1_alarmclock_disp_select[5] & H1L15 & !J1_alarmclock_disp_select[4];


--H1L35 is disp_data_mux:inst8|Data~1533
--operation mode is normal

H1L35 = U1_disp_select[5] & !U1_disp_select[4] & !U1_disp_select[3] & !U1_disp_select[2] # !U1_disp_select[5] & U1_disp_select[4] & !U1_disp_select[3] & !U1_disp_select[2] # !U1_disp_select[4] & U1_disp_select[3] $ U1_disp_select[2];


--H1L45 is disp_data_mux:inst8|Data~1534
--operation mode is normal

H1L45 = H1L35 & !H1L16 & !D1_Alarmclock_EN;


--H1L55 is disp_data_mux:inst8|Data~1535
--operation mode is normal

H1L55 = J1_alarmclock_disp_select[3] & H1L33 & !J1_alarmclock_disp_select[2] & !J1_alarmclock_disp_select[0];


--H1L65 is disp_data_mux:inst8|Data~1536
--operation mode is normal

H1L65 = H1L55 # G1_time_disp_select[3] & H1L24 & H1L94;


--H1L75 is disp_data_mux:inst8|Data~1537
--operation mode is normal

H1L75 = H1L53 & G1_time_disp_select[4] & !G1_time_disp_select[1] & !G1_time_disp_select[0];


--H1L85 is disp_data_mux:inst8|Data~1538
--operation mode is normal

H1L85 = H1L75 # J1_alarmclock_disp_select[4] & H1L15 & !J1_alarmclock_disp_select[5];


--H1L95 is disp_data_mux:inst8|Data~1539
--operation mode is normal

H1L95 = !H1L65 & !H1L85 & H1L25 # H1L45;


--H1L51 is disp_data_mux:inst8|Data~390
--operation mode is normal

H1L51 = H1L65 # H1L85;


--H1L06 is disp_data_mux:inst8|Data~1540
--operation mode is normal

H1L06 = H1L65 # H1L25 & !H1L85;


--H1L21 is disp_data_mux:inst8|Data~7adv_mux_opt_ptn_431
--operation mode is normal

H1L21 = H1L51 & H1L06 & L1L31 # !H1L06 & L1L1 # !H1L51 & H1L06;


--H1L31 is disp_data_mux:inst8|Data~7adv_mux_opt_ptn_432
--operation mode is normal

H1L31 = H1L95 & H1L21 & L1L5 # !H1L21 & H1L71 # !H1L95 & H1L21;


--H1L81 is disp_data_mux:inst8|Data~405
--operation mode is normal

H1L81 = H1L41 & H1L54 # !H1L41 & H1L54 & L1L9 # !H1L54 & H1L31;


--H1L91 is disp_data_mux:inst8|Data~406
--operation mode is normal

H1L91 = H1L41 & H1L81 & L1L71 # !H1L81 & L1L12 # !H1L41 & H1L81;


--D1_DateSet_EN is maincontrol:inst3|DateSet_EN
--operation mode is normal

D1_DateSet_EN_lut_out = D1_Function[2] & D1_Function[0] & !D1_Function[1];
D1_DateSet_EN = DFFEAS(D1_DateSet_EN_lut_out, SW3, VCC, , , , , , );


--D1_Date_EN is maincontrol:inst3|Date_EN
--operation mode is normal

D1_Date_EN_lut_out = D1_Function[2] & !D1_Function[1] & !D1_Function[0];
D1_Date_EN = DFFEAS(D1_Date_EN_lut_out, SW3, VCC, , , , , , );


--H1L26 is disp_data_mux:inst8|always0~4
--operation mode is normal

H1L26 = H1L16 # D1_Alarmclock_EN # D1_DateSet_EN # D1_Date_EN;


--H1_Data[0] is disp_data_mux:inst8|Data[0]
--operation mode is normal

H1_Data[0] = H1L26 & H1L91 # !H1L26 & H1_Data[0];


--U1_month1[1] is date_main:inst4|datecontrol:b2v_inst1|month1[1]
--operation mode is normal

U1_month1[1]_lut_out = S91_safe_q[1] & !T1_EO1 # !D1_Date_EN;
U1_month1[1